9923d29cfa
Unify VPlan verifiers in verifyVPlanIsValid. This adds verification for various properties on blocks to the verifier used for VPlans generated by the inner loop vectorizer. It also adds def-use checks for the verifier used in the VPlan native path. This drops the separate flag to enable HCFG verification. Instead, all VPlans are verified once they have been created, if assertions are enabled. This also removes VPWidenPHIRecipe from VPHeaderPHIRecipe; it is used to model any phi node in the native path.
69 lines
2.2 KiB
C++
69 lines
2.2 KiB
C++
//===-- VPlanHCFGBuilder.h --------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file defines the VPlanHCFGBuilder class which contains the public
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/// interface (buildHierarchicalCFG) to build a VPlan-based Hierarchical CFG
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/// (H-CFG) for an incoming IR.
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///
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/// A H-CFG in VPlan is a control-flow graph whose nodes are VPBasicBlocks
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/// and/or VPRegionBlocks (i.e., other H-CFGs). The outermost H-CFG of a VPlan
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/// consists of a VPRegionBlock, denoted Top Region, which encloses any other
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/// VPBlockBase in the H-CFG. This guarantees that any VPBlockBase in the H-CFG
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/// other than the Top Region will have a parent VPRegionBlock and allows us
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/// to easily add more nodes before/after the main vector loop (such as the
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/// reduction epilogue).
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TRANSFORMS_VECTORIZE_VPLAN_VPLANHCFGBUILDER_H
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#define LLVM_TRANSFORMS_VECTORIZE_VPLAN_VPLANHCFGBUILDER_H
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#include "VPlanDominatorTree.h"
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namespace llvm {
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class Loop;
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class LoopInfo;
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class VPRegionBlock;
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class VPlan;
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class VPlanTestBase;
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/// Main class to build the VPlan H-CFG for an incoming IR.
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class VPlanHCFGBuilder {
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friend VPlanTestBase;
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private:
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// The outermost loop of the input loop nest considered for vectorization.
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Loop *TheLoop;
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// Loop Info analysis.
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LoopInfo *LI;
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// The VPlan that will contain the H-CFG we are building.
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VPlan &Plan;
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// Dominator analysis for VPlan plain CFG to be used in the
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// construction of the H-CFG. This analysis is no longer valid once regions
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// are introduced.
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VPDominatorTree VPDomTree;
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/// Build plain CFG for TheLoop and connects it to Plan's entry.
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void buildPlainCFG();
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public:
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VPlanHCFGBuilder(Loop *Lp, LoopInfo *LI, VPlan &P)
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: TheLoop(Lp), LI(LI), Plan(P) {}
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/// Build H-CFG for TheLoop and update Plan accordingly.
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void buildHierarchicalCFG();
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};
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} // namespace llvm
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#endif // LLVM_TRANSFORMS_VECTORIZE_VPLAN_VPLANHCFGBUILDER_H
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