133406e3d9
The iOS 2.x ABI had R9 as a reserved register, 3.0 made it available, but support for the 2.x ABI was never added to LLVM. We only use the 2.x ABI on armv6 since before 3.0 armv6 was the only architecture supported by iOS.
35 lines
1.5 KiB
LLVM
35 lines
1.5 KiB
LLVM
; RUN: llc <%s -mtriple=arm-none-eabi 2>&1 | FileCheck %s -check-prefix=CHECK
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; RUN: llc <%s -mtriple=arm-none-eabi -relocation-model=rwpi 2>&1 \
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; RUN: | FileCheck %s -check-prefix=RWPI
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; RUN: llc <%s -mtriple=arm-none-eabi --frame-pointer=all 2>&1 \
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; RUN: | FileCheck %s -check-prefix=NO_FP_ELIM
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; RUN: llc <%s -mtriple=armv6-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS2
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; RUN: llc <%s -mtriple=armv6k-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS2
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; RUN: llc <%s -mtriple=armv6k-apple-ios3 2>&1 | FileCheck %s -check-prefix=IOS3
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; RUN: llc <%s -mtriple=armv7-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS3
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; CHECK: warning: inline asm clobber list contains reserved registers: SP, PC
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; CHECK: warning: inline asm clobber list contains reserved registers: R11
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; RWPI: warning: inline asm clobber list contains reserved registers: R9, SP, PC
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; RWPI: warning: inline asm clobber list contains reserved registers: R11
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; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R11, SP, PC
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; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R11
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; IOS2: warning: inline asm clobber list contains reserved registers: R9, SP, PC
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; IOS3: warning: inline asm clobber list contains reserved registers: SP, PC
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define void @foo() nounwind {
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call void asm sideeffect "mov r7, #1",
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"~{r9},~{r11},~{r12},~{lr},~{sp},~{pc},~{r10}"()
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ret void
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}
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define i32 @bar(i32 %i) {
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%vla = alloca i32, i32 %i, align 4
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tail call void asm sideeffect "mov r7, #1", "~{r11}"()
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%1 = load volatile i32, ptr %vla, align 4
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ret i32 %1
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}
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