Zhijin Zeng 7a58e77143

[JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 (#153778) ...

Support bolt instrument the elf binary which has exception handling table.

Fixes #153775

2025-09-09 17:51:30 +08:00

..

AArch32

[llvm-jitlink] Use -num-threads=0 for regression tests relying on debug output.

2025-01-08 14:01:33 +11:00

AArch64

[JITLink] Include target addend in out-of-range error (#145423)

2025-06-23 22:46:15 -07:00

Generic

[ORC] Apply MachO::CPU_SUBTYPE_MASK to comparison in getDylibInterfac… (#145154)

2025-06-21 19:31:51 +10:00

LoongArch

[JITLink][LoongArch] Add label addition and subtraction relocations (#122262)

2025-01-24 15:11:39 +08:00

ppc64

[JITLink][XCOFF] Setup initial build support for XCOFF (#127266)

2025-04-03 17:01:18 -04:00

RISCV

[JITLink][RISC-V] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 (#153778)

2025-09-09 17:51:30 +08:00

x86

[JITLink] Rename 'i386' namespace and files to 'x86'.

2025-05-08 11:35:14 +10:00

x86-64

[llvm] Remove uses of %T in tests (#151621)

2025-08-01 08:24:56 -07:00

lit.local.cfg

Mark ExecutionEngine/JITLink and ExecutionEngine/Orc as unsupported on AIX (#156076)

2025-09-02 09:38:41 -04:00