50b9ca4dda
After https://github.com/llvm/llvm-project/pull/153643, there may be a BranchOnCond with constant condition in the entry block. Simplify those in removeBranchOnConst. This removes a number of redundant conditional branch from entry blocks. In some cases, it may also make the original scalar loop unreachable, because we know it will never execute. In that case, we need to remove the loop from LoopInfo, because all unreachable blocks may dominate each other, making LoopInfo invalid. In those cases, we can also completely remove the loop, for which I'll share a follow-up patch. Depends on https://github.com/llvm/llvm-project/pull/153643. PR: https://github.com/llvm/llvm-project/pull/154510
73 lines
3.5 KiB
LLVM
73 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
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define void @foo(ptr %ptr, ptr %ptr.2) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[VECTOR_MEMCHECK:%.*]]
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, ptr [[PTR_2:%.*]], i64 4
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; CHECK-NEXT: [[UGLYGEP1:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 640
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[PTR_2]], [[UGLYGEP1]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[PTR]], [[UGLYGEP]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 2, i64 3, i64 4, i64 5>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 2, [[INDEX]]
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; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[OFFSET_IDX]] to i32
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; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 0
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; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP0]], 1
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; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP0]], 2
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; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP0]], 3
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; CHECK-NEXT: store i32 [[TMP4]], ptr [[PTR_2]], align 4, !alias.scope [[META0:![0-9]+]], !noalias [[META3:![0-9]+]]
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; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[PTR]], i64 [[INDEX]]
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; CHECK-NEXT: store <4 x i64> [[VEC_IND]], ptr [[TMP6]], align 8, !alias.scope [[META3]]
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], splat (i64 4)
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; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 80
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; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[CAN_IV:%.*]] = phi i64 [ 0, [[SCALAR_PH]] ], [ [[CAN_IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[TMP9:%.*]] = phi i64 [ 2, [[SCALAR_PH]] ], [ [[TMP12:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 4294967295
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; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP9]] to i32
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; CHECK-NEXT: store i32 [[TMP11]], ptr [[PTR_2]], align 4
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; CHECK-NEXT: [[GEP_PTR:%.*]] = getelementptr inbounds i64, ptr [[PTR]], i64 [[CAN_IV]]
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; CHECK-NEXT: store i64 [[TMP9]], ptr [[GEP_PTR]], align 8
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; CHECK-NEXT: [[TMP12]] = add nuw nsw i64 [[TMP10]], 1
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; CHECK-NEXT: [[TMP13:%.*]] = icmp sgt i32 [[TMP11]], 80
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; CHECK-NEXT: [[CAN_IV_NEXT]] = add nuw nsw i64 [[CAN_IV]], 1
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; CHECK-NEXT: br i1 [[TMP13]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP8:![0-9]+]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%can.iv = phi i64 [ 0, %entry ], [ %can.iv.next, %loop ]
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%0 = phi i64 [ 2, %entry ], [ %3, %loop ]
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%1 = and i64 %0, 4294967295
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%2 = trunc i64 %0 to i32
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store i32 %2, ptr %ptr.2
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%gep.ptr = getelementptr inbounds i64, ptr %ptr, i64 %can.iv
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store i64 %0, ptr %gep.ptr
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%3 = add nuw nsw i64 %1, 1
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%4 = icmp sgt i32 %2, 80
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%can.iv.next = add nuw nsw i64 %can.iv, 1
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br i1 %4, label %exit, label %loop
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exit:
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ret void
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}
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