llvm-project

History

Keshav Vinayak Jha edc76e15ed

[ROCDL][LLVM] Added rocdl.fmed3 -> Intrinsic::amdgcn_fmed3 (#159332 )

## Description
Added ROCDL fmed3 op to support rewrite to `amdgcn_fmed3` intrinsic.

## Testing
- ROCDL -> LLVMIR lit tests for new `rocdl.med3` ops in
`/test/Target/LLVMIR/rocdl.mlir`

Addresses [#157052](https://github.com/llvm/llvm-project/issues/157052)

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Signed-off-by: keshavvinayak01 <keshavvinayakjha@gmail.com>

2025-09-29 09:47:36 +01:00

Cpp

[mlir][emitc] Turn constant into CExpression (#156450 )

2025-09-06 13:10:43 +03:00

ExportSMTLIB

[mlir][SMT] add missing ExportSMTLIB tests (#136069 )

2025-04-16 23:54:35 -04:00

LLVMIR

[ROCDL][LLVM] Added rocdl.fmed3 -> Intrinsic::amdgcn_fmed3 (#159332 )

2025-09-29 09:47:36 +01:00

SMTLIB

[mlir][SMT] add export smtlib (#131492 )