David Green dbca8a49b6

[DAG] Improve known bits of Zext/Sext loads with range metadata (#80829) ...

This extends the known bits for extending loads which have range
metadata, handling the range metadata on the original memory type,
extending that to the correct BitWidth.

2024-02-29 12:53:13 +00:00

..

CMakeLists.txt

Split out CodeGenTypes from CodeGen for LLT/MVT

2023-05-03 00:13:20 +09:00

DAGCombiner.cpp

[SelectionDAG] Change computeAliasing signature from optional<uint64> to LocationSize. (#83017)

2024-02-28 09:43:05 +00:00

FastISel.cpp

[RemoveDIs] Add DPLabels support [3a/3] (#82633)

2024-02-23 11:37:21 +00:00

FunctionLoweringInfo.cpp

Revert "Implement convergence control in MIR using SelectionDAG (#71785)"

2024-02-21 11:07:02 +05:30

InstrEmitter.cpp

Revert "Implement convergence control in MIR using SelectionDAG (#71785)"

2024-02-21 11:07:02 +05:30

InstrEmitter.h

[DebugInfo] Store instr-ref mode of MachineFunction in member

2023-01-20 14:47:11 +00:00

LegalizeDAG.cpp

Correctly round FP -> BF16 when SDAG expands such nodes (#82399)

2024-02-21 12:37:02 -05:00

LegalizeFloatTypes.cpp

DAG: Fix chain mismanagement in SoftenFloatRes_FP_EXTEND (#74558)

2024-01-18 14:32:44 +07:00

LegalizeIntegerTypes.cpp

[RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during type legalization. (#82716)

2024-02-26 10:31:58 -08:00

LegalizeTypes.cpp

[SelectionDAG] Adjust placement of blank lines in debug output. NFC (#70969)

2023-11-02 09:35:04 -07:00

LegalizeTypes.h

[RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during type legalization. (#82716)

2024-02-26 10:31:58 -08:00

LegalizeTypesGeneric.cpp

[llvm][TypeSize] Fix addition/subtraction in TypeSize. (#72979)

2023-11-22 08:52:53 +00:00

LegalizeVectorOps.cpp

[SelectionDAG][RISCV] Use FP type for legality query for LRINT/LLRINT in LegalizeVectorOps. (#82728)

2024-02-22 20:18:52 -08:00

LegalizeVectorTypes.cpp

[VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (#82627)

2024-02-26 16:37:41 +08:00

MatchContext.h

[RISCV][VP] Introduce vp saturating addition/subtraction and RISC-V support. (#82370)

2024-02-23 14:17:15 +08:00

ResourcePriorityQueue.cpp

…

ScheduleDAGFast.cpp

[llvm][NFC] Use SDValue::getConstantOperandVal(i) where possible (#76708)

2024-01-02 13:14:28 +00:00

ScheduleDAGRRList.cpp

[llvm] Move CodeGenTypes library to its own directory (#79444)

2024-01-25 12:01:31 -05:00

ScheduleDAGSDNodes.cpp

Fix MSVC signed/unsigned mismatch warning. NFC.

2023-12-01 18:34:01 +00:00

ScheduleDAGSDNodes.h

[llvm] Move CodeGenTypes library to its own directory (#79444)

2024-01-25 12:01:31 -05:00

ScheduleDAGVLIW.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

SDNodeDbgValue.h

[DebugInfo] Remove dbg.addr from CodeGen

2023-03-02 09:29:43 +00:00

SelectionDAG.cpp

[DAG] Improve known bits of Zext/Sext loads with range metadata (#80829)

2024-02-29 12:53:13 +00:00

SelectionDAGAddressAnalysis.cpp

[SelectionDAG] Change computeAliasing signature from optional<uint64> to LocationSize. (#83017)

2024-02-28 09:43:05 +00:00

SelectionDAGBuilder.cpp

[SelectionDAG] Remove pointer from MMO for VP strided load/store. (#82667)

2024-02-26 16:15:34 -08:00

SelectionDAGBuilder.h

Revert "Implement convergence control in MIR using SelectionDAG (#71785)"

2024-02-21 11:07:02 +05:30

SelectionDAGDumper.cpp

Revert "Implement convergence control in MIR using SelectionDAG (#71785)"

2024-02-21 11:07:02 +05:30

SelectionDAGISel.cpp

Revert "Implement convergence control in MIR using SelectionDAG (#71785)"

2024-02-21 11:07:02 +05:30

SelectionDAGPrinter.cpp

…

SelectionDAGTargetInfo.cpp

…

StatepointLowering.cpp

[StatepointLowering] Use Constant instead of TargetConstant for undef value (#81635)

2024-02-13 21:58:01 +03:00

StatepointLowering.h

…

TargetLowering.cpp

Fix non-splat vector SREM expansion when one of the divisors is a power of two. (#82706)

2024-02-25 10:13:05 -05:00