Stanislav Mekhanoshin 21704a685d

[AMDGPU] Fix printing hasInitWholeWave in mir (#123232)

2025-01-17 03:00:02 -08:00

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custom-pseudo-source-values.ll

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dead-flag-on-use-operand-parse-error.mir

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empty-custom-regmask.mir

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expected-target-index-name.mir

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init-whole.wave.ll

[AMDGPU] Fix printing hasInitWholeWave in mir (#123232)

2025-01-17 03:00:02 -08:00

intrinsics.mir

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invalid-frame-index2.mir

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invalid-frame-index-invalid-fixed-stack.mir

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invalid-frame-index-invalid-stack.mir

[AMDGPU] Serialize MFInfo::ScavengeFI

2021-05-07 11:15:25 +02:00

invalid-frame-index-no-stack.mir

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invalid-frame-index.mir

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invalid-target-index-operand.mir

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killed-flag-on-def-parse-error.mir

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lit.local.cfg

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llc-target-cpu-attr-from-cmdline-ir.mir

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llc-target-cpu-attr-from-cmdline.mir

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long-branch-reg-all-sgpr-used.ll

[AMDGPU] Make max dwords of memory cluster configurable (#119342)

2024-12-18 14:17:27 +08:00

machine-function-info-after-pei.ll

[AMDGPU] Make max dwords of memory cluster configurable (#119342)

2024-12-18 14:17:27 +08:00

machine-function-info-dynlds-align-invalid-case.mir

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machine-function-info-long-branch-reg-debug.ll

[AMDGPU] Make max dwords of memory cluster configurable (#119342)

2024-12-18 14:17:27 +08:00

machine-function-info-long-branch-reg.ll

[AMDGPU] Make max dwords of memory cluster configurable (#119342)

2024-12-18 14:17:27 +08:00

machine-function-info-no-ir.mir

[AMDGPU] Make max dwords of memory cluster configurable (#119342)

2024-12-18 14:17:27 +08:00

machine-function-info-register-parse-error1.mir

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machine-function-info-register-parse-error2.mir

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machine-function-info.ll

[AMDGPU] Make max dwords of memory cluster configurable (#119342)

2024-12-18 14:17:27 +08:00

machine-metadata-error.mir

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machine-metadata.mir

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mfi-frame-offset-reg-class.mir

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mfi-parse-error-frame-offset-reg.mir

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mfi-parse-error-scratch-rsrc-reg.mir

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mfi-parse-error-stack-ptr-offset-reg.mir

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mfi-scratch-rsrc-reg-reg-class.mir

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mfi-stack-ptr-offset-reg-class.mir

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mir-canon-multi.mir

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mircanon-memoperands.mir

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noconvergent-invalid.mir

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noconvergent.mir

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parse-order-reserved-regs.mir

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sgpr-for-exec-copy-invalid-reg.mir

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spill-phys-vgprs-invalid.mir

[AMDGPU][MIR] Serialize SpillPhysVGPRs (#113129)

2024-11-05 13:17:25 +05:30

spill-phys-vgprs-not-a-reg.mir

[AMDGPU][MIR] Serialize SpillPhysVGPRs (#113129)

2024-11-05 13:17:25 +05:30

spill-phys-vgprs.mir

[AMDGPU] Fix 3495d04 MIR test (#114963)

2024-11-05 17:11:47 +05:30

stack-id-assert.mir

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stack-id.mir

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subreg-def-is-not-ssa.mir

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syncscopes.mir

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target-flags.mir

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target-index-operands.mir

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target-memoperands.mir

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vgpr-for-agpr-copy-invalid-reg.mir

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virtreg-uses-unallocatable-class.mir

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wwm-reserved-regs-invalid-reg.mir

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wwm-reserved-regs-not-a-reg.mir

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wwm-reserved-regs.mir

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