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llvm-project/mlir/integration_test/Dialect/Vector/CPU
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aartbik 6404fb428a [mlir] [VectorOps] [integration-test] Add i64 typed outer product
Yields proper SIMD vpmullq/vpaddq on x86.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D83328
2020-07-07 12:34:41 -07:00
..
lit.local.cfg
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test-broadcast.mlir
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test-constant-mask.mlir
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test-contraction.mlir
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test-create-mask-v4i1.mlir
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test-create-mask.mlir
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test-extract-slices.mlir
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test-extract-strided-slice.mlir
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test-flat-transpose-col.mlir
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test-flat-transpose-row.mlir
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test-fma.mlir
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test-insert-slices.mlir
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test-insert-strided-slice.mlir
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test-matrix-multiply-col.mlir
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test-matrix-multiply-row.mlir
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test-outerproduct-f32.mlir
[mlir] [VectorOps] [integration-test] Add i64 typed outer product
2020-07-07 12:34:41 -07:00
test-outerproduct-i64.mlir
[mlir] [VectorOps] [integration-test] Add i64 typed outer product
2020-07-07 12:34:41 -07:00
test-reductions-f32-reassoc.mlir
[mlir] [VectorOps] Extend vector reduction integration test with reassoc=true cases.
2020-06-29 13:28:20 -07:00
test-reductions-f32.mlir
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test-reductions-f64-reassoc.mlir
[mlir] [VectorOps] Extend vector reduction integration test with reassoc=true cases.
2020-06-29 13:28:20 -07:00
test-reductions-f64.mlir
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test-reductions-i32.mlir
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test-reductions-i64.mlir
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test-shape-cast.mlir
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test-shuffle.mlir
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test-transfer-read.mlir
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test-transfer-write.mlir
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test-transpose.mlir
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