ec3525f784
During instruction selection on load instructions, transform loads of [register+offset] into [symbol+offset] if the register value is the result of an ADD instruction(s) of a symbol and constant(s). This enables the removal of any ADD(s) of the symbol that are not combined with the load to create a ld.param. This is normally not an issue when DAG combines are enabled as any extra ADDs would be folded. However, when DAG combines are disabled, there may be cases where an ADD of a symbol is consumed by multiple other nodes and is retained in generated code as a PTX `add` instruction that uses the symbol as an operand - this is illegal PTX.
55 lines
2.0 KiB
LLVM
55 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -march=nvptx64 --debug-counter=dagcombine=0 | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -march=nvptx64 --debug-counter=dagcombine=0 | %ptxas-verify %}
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; REQUIRES: asserts
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; asserts are required for --debug-counter=dagcombine=0 to have the intended
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; effect of disabling DAG combines, which exposes the bug. When combines are
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; enabled the bug does not occur.
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%struct.1float = type <{ [1 x float] }>
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declare i32 @callee(%struct.1float %a)
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define i32 @test(%struct.1float alignstack(32) %data) {
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; CHECK-LABEL: test(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<18>;
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; CHECK-NEXT: .reg .f32 %f<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.u8 %r1, [test_param_0+1];
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; CHECK-NEXT: shl.b32 %r2, %r1, 8;
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; CHECK-NEXT: ld.param.u8 %r3, [test_param_0];
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; CHECK-NEXT: or.b32 %r4, %r2, %r3;
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; CHECK-NEXT: ld.param.u8 %r5, [test_param_0+3];
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; CHECK-NEXT: shl.b32 %r6, %r5, 8;
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; CHECK-NEXT: ld.param.u8 %r7, [test_param_0+2];
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; CHECK-NEXT: or.b32 %r8, %r6, %r7;
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; CHECK-NEXT: shl.b32 %r9, %r8, 16;
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; CHECK-NEXT: or.b32 %r17, %r9, %r4;
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; CHECK-NEXT: mov.b32 %f1, %r17;
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; CHECK-NEXT: shr.u32 %r12, %r17, 8;
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; CHECK-NEXT: shr.u32 %r13, %r17, 16;
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; CHECK-NEXT: shr.u32 %r14, %r17, 24;
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; CHECK-NEXT: { // callseq 0, 0
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; CHECK-NEXT: .param .align 1 .b8 param0[4];
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; CHECK-NEXT: st.param.b8 [param0], %r17;
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; CHECK-NEXT: st.param.b8 [param0+1], %r12;
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; CHECK-NEXT: st.param.b8 [param0+2], %r13;
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; CHECK-NEXT: st.param.b8 [param0+3], %r14;
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; CHECK-NEXT: .param .b32 retval0;
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; CHECK-NEXT: call.uni (retval0),
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; CHECK-NEXT: callee,
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; CHECK-NEXT: (
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; CHECK-NEXT: param0
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; CHECK-NEXT: );
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; CHECK-NEXT: ld.param.b32 %r15, [retval0];
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; CHECK-NEXT: } // callseq 0
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; CHECK-NEXT: st.param.b32 [func_retval0], %r15;
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; CHECK-NEXT: ret;
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%1 = call i32 @callee(%struct.1float %data)
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ret i32 %1
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}
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