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llvm-project/llvm/test/MachineVerifier/AMDGPU
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Matt Arsenault 6017480461
MachineVerifier: Fix check for range type (#124894)
We need to permit scalar extending loads with range annotations.

Fix expensive_checks failures after 11db7fb09b36e656a801117d6a2492133e9c2e46
2025-01-30 10:56:12 +07:00
..
fix-illegal-vector-copies.mir
[AMDGPU,test] Change llc -march= to -mtriple=
2024-12-15 10:54:21 -08:00
issue98474-missing-def-liveout-physical-subregister.mir
VirtRegRewriter: Add implicit register defs for live out undef lanes (#112679)
2024-10-28 17:33:53 -07:00
lit.local.cfg
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register-killed-inside-loop.mir
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test_g_bitcast.mir
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test_g_incompatible_range.mir
MachineVerifier: Fix check for range type (#124894)
2025-01-30 10:56:12 +07:00
test_g_intrinsic_w_side_effects.mir
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test_g_intrinsic.mir
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undef-should-only-be-set-on-subreg-defs.mir
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undef-virt-reg-entry-block.mir
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undef-virt-reg-nonentry-block.mir
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unsupported-subreg-index-aligned-vgpr-check.mir
AMDGPU: Fix verifier assert with out of bounds subregister indexes (#119799)
2024-12-13 11:52:11 +09:00
verifier-ec-subreg-liveness.mir
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verifier-implicit-virtreg-invalid-physreg-liveness.mir
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verifier-pseudo-terminators.mir
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verify-implicit-def.mir
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verify-reg-sequence.mir
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writelane_m0.mir
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