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llvm-project/llvm/lib/Target/AMDGPU
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Matt Arsenault 90ff148719 AMDGPU: Account for implicit argument alignment for kernarg segment 
If a kernel had no formal arguments but did have the implicit
arguments, we were reporting a required kernarg alignment of 4. For
some reason we require an 8-byte alignment for this, even though
there's no real advantage and I don't see where this is documented in
the ABI.

The code object header code also claims the minimum alignment is 16,
which is what I thought you always got at runtime anyway so I don't
know why this matters.
2021-11-09 17:48:37 -05:00
..
AsmParser
[AMDGPU] Support shared literals in FMAMK/FMAAK
2021-10-11 13:09:54 -04:00
Disassembler
[AMDGPU] Support shared literals in FMAMK/FMAAK
2021-10-11 13:09:54 -04:00
MCA
Ensure newlines at the end of files (NFC)
2021-10-23 08:45:29 -07:00
MCTargetDesc
[AMDGPU] Remove unneeded emit literal check
2021-10-13 12:46:22 -04:00
TargetInfo
Fix shlib builds for all lib/Target/*/TargetInfo libs
2021-10-08 15:21:13 -07:00
Utils
[AMDGPU] Support shared literals in FMAMK/FMAAK
2021-10-11 13:09:54 -04:00
AMDGPU.h
[AMDGPU] Promote generic pointer kernel arguments into global
2021-10-12 10:07:33 -07:00
AMDGPU.td
[AMDGPU] Test Commit. NFC
2021-11-08 07:09:09 +00:00
AMDGPUAliasAnalysis.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
AMDGPUAliasAnalysis.h
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
AMDGPUAlwaysInlinePass.cpp
[HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols
2021-10-18 16:53:15 -06:00
AMDGPUAnnotateKernelFeatures.cpp
[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
2021-09-20 14:48:50 -07:00
AMDGPUAnnotateUniformValues.cpp
[OpaquePtr] Clean up some uses of Type::getPointerElementType()
2021-05-31 09:54:57 -07:00
AMDGPUArgumentUsageInfo.cpp
[GlobalISel] NFC: Change LLT::vector to take ElementCount.
2021-06-24 11:26:12 +01:00
AMDGPUArgumentUsageInfo.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
AMDGPUAsmPrinter.cpp
AMDGPU: Account for implicit argument alignment for kernarg segment
2021-11-09 17:48:37 -05:00
AMDGPUAsmPrinter.h
[AMDGPU] Remove unused declaration findNumUsedRegistersSI (NFC)
2021-10-27 21:24:02 -07:00
AMDGPUAtomicOptimizer.cpp
[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
2021-09-20 14:48:50 -07:00
AMDGPUAttributor.cpp
Put implementation details into anonymous namespaces. NFCI.
2021-11-07 15:18:30 +01:00
AMDGPUCallingConv.td
[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.
2021-11-04 21:50:18 +01:00
AMDGPUCallLowering.cpp
[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.
2021-11-04 21:50:18 +01:00
AMDGPUCallLowering.h
AMDGPU/GlobalISel: Redo kernel argument load handling
2021-07-16 08:56:54 -04:00
AMDGPUCodeGenPrepare.cpp
[AMDGPU] Change numBitsSigned for simplicity and document it. NFC.
2021-10-29 14:22:06 +01:00
AMDGPUCombine.td
[GlobalISel] Add combine for PTR_ADD with regbanks
2021-08-17 13:58:16 +02:00
AMDGPUCtorDtorLowering.cpp
[AMDGPU] Change ASAN init/fini kernels linkage to external.
2021-09-27 11:50:37 -06:00
AMDGPUExportClustering.cpp
[AMDGPU][MC] Refactored exp tgt handling
2021-01-26 14:54:15 +03:00
AMDGPUExportClustering.h
[llvm] Add missing header guards (NFC)
2021-01-30 09:53:42 -08:00
AMDGPUFeatures.td
AMDGPU: Remove FeatureLocalMemorySize0
2021-09-02 22:43:01 -04:00
AMDGPUFixFunctionBitcasts.cpp
…
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGenRegisterBankInfo.def
AMDGPU/GlobalISel: Fix missing 256-bit AGPR mapping
2020-08-17 09:53:26 -04:00
AMDGPUGISel.td
[AMDGPU][GlobalISel] Add G_AMDGPU_FFBL_B32
2021-08-06 09:40:48 +01:00
AMDGPUGlobalISelUtils.cpp
[AMDGPU][GlobalISel] Handle G_PTR_ADD when looking for constant offset
2021-01-28 11:20:09 +01:00
AMDGPUGlobalISelUtils.h
[ADT] Move DenseMapInfo for ArrayRef/StringRef into respective headers (NFC)
2021-06-03 18:34:36 +02:00
AMDGPUHSAMetadataStreamer.cpp
AMDGPU: Account for implicit argument alignment for kernarg segment
2021-11-09 17:48:37 -05:00
AMDGPUHSAMetadataStreamer.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUInstCombineIntrinsic.cpp
[llvm] Migrate from arg_operands to args (NFC)
2021-09-30 08:51:21 -07:00
AMDGPUInstrInfo.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUInstrInfo.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUInstrInfo.td
[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.
2021-11-04 21:50:18 +01:00
AMDGPUInstructions.td
[AMDGPU] Add constrained shift pattern matches.
2021-10-26 19:07:19 +05:30
AMDGPUInstructionSelector.cpp
[AMDGPU][GlobalISel] Fix waterfall loops
2021-10-28 10:30:55 +02:00
AMDGPUInstructionSelector.h
[AMDGPU] Remove unused declaration selectSMRD (NFC)
2021-11-07 09:53:18 -08:00
AMDGPUISelDAGToDAG.cpp
[AMDGPU] Enable divergence-driven BFE selection
2021-11-03 23:26:59 +03:00
AMDGPUISelDAGToDAG.h
[AMDGPU] Enable divergence-driven BFE selection
2021-11-03 23:26:59 +03:00
AMDGPUISelLowering.cpp
[DAG] Add SelectionDAG::ComputeMinSignedBits helper
2021-11-08 14:12:45 +00:00
AMDGPUISelLowering.h
[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.
2021-11-04 21:50:18 +01:00
AMDGPULateCodeGenPrepare.cpp
[AArch64, AMDGPU] Use make_early_inc_range (NFC)
2021-11-03 09:22:51 -07:00
AMDGPULegalizerInfo.cpp
[AMDGPU][GlobalISel] Fix legalization of G_UMULH
2021-10-05 10:56:02 +01:00
AMDGPULegalizerInfo.h
[AMDGPU][GlobalISel] Better legalization of 32-bit ctlz/cttz
2021-08-06 09:40:48 +01:00
AMDGPULibCalls.cpp
[Target, Transforms] Use StringRef::contains (NFC)
2021-10-22 08:52:33 -07:00
AMDGPULibFunc.cpp
[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
2021-09-20 14:48:50 -07:00
AMDGPULibFunc.h
…
AMDGPULowerIntrinsics.cpp
[AArch64, AMDGPU] Use make_early_inc_range (NFC)
2021-11-03 09:22:51 -07:00
AMDGPULowerKernelArguments.cpp
[NFC] More get/removeAttribute() cleanup
2021-08-17 21:05:41 -07:00
AMDGPULowerKernelAttributes.cpp
[AMDGPU] Fix pass name of AMDGPULowerKernelAttributes. NFC.
2021-07-06 15:03:31 -07:00
AMDGPULowerModuleLDSPass.cpp
[AMDGPU] Correctly merge alias.scope and noalias metadata for memops
2021-09-21 13:02:01 -05:00
AMDGPUMachineCFGStructurizer.cpp
[AMDGPU] Use MachineBasicBlock::{predecessors,successors} (NFC)
2021-11-06 19:31:20 -07:00
AMDGPUMachineFunction.cpp
[AMDGPU] Fix module LDS selection
2021-05-20 15:59:01 -07:00
AMDGPUMachineFunction.h
[amdgpu] Implement lower function LDS pass
2021-03-15 15:24:01 +00:00
AMDGPUMachineModuleInfo.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUMachineModuleInfo.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUMacroFusion.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
AMDGPUMacroFusion.h
[llvm] Add missing header guards (NFC)
2021-01-30 09:53:42 -08:00
AMDGPUMCInstLower.cpp
[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.
2021-11-04 21:50:18 +01:00
AMDGPUMCInstLower.h
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
AMDGPUMIRFormatter.cpp
[AMDGPU] Implement mir parseCustomPseudoSourceValue
2021-01-22 11:24:08 +01:00
AMDGPUMIRFormatter.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUPerfHintAnalysis.cpp
[AMDGPU] Tune perfhint analysis to account access width
2021-07-21 12:46:10 -07:00
AMDGPUPerfHintAnalysis.h
[AMDGPU] Tune perfhint analysis to account access width
2021-07-21 12:46:10 -07:00
AMDGPUPostLegalizerCombiner.cpp
AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE
2021-04-27 12:26:37 +02:00
AMDGPUPreLegalizerCombiner.cpp
[AMDGPU][GlobalISel] Legalize memcpy family of intrinsics
2021-09-07 12:24:07 +02:00
AMDGPUPrintfRuntimeBinding.cpp
[Target] Migrate from getNumArgOperands to arg_size (NFC)
2021-10-02 12:06:29 -07:00
AMDGPUPromoteAlloca.cpp
[AMDGPU] Limit promote alloca max size in functions
2021-09-24 13:38:39 -07:00
AMDGPUPromoteKernelArguments.cpp
[AMDGPU] Promote generic pointer kernel arguments into global
2021-10-12 10:07:33 -07:00
AMDGPUPropagateAttributes.cpp
AMDGPU: Use attributor to propagate amdgpu-flat-work-group-size
2021-10-22 16:23:50 -04:00
AMDGPUPTNote.h
AMDGPU: Add target id and code object v4 support
2021-03-24 11:54:05 -04:00
AMDGPURegBankCombiner.cpp
GlobalISel/Utils: Refactor integer/float constant match functions
2021-09-17 11:22:13 +02:00
AMDGPURegisterBankInfo.cpp
[AMDGPU][GlobalISel] Fix waterfall loops
2021-10-28 10:30:55 +02:00
AMDGPURegisterBankInfo.h
[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX
2021-06-28 09:06:44 -04:00
AMDGPURegisterBanks.td
[AMDGPU] Add 224-bit vector types and link 192-bit types to MVTs
2021-06-24 12:41:22 +09:00
AMDGPUReplaceLDSUseWithPointer.cpp
Use llvm::erase_if (NFC)
2021-10-18 09:33:42 -07:00
AMDGPUResourceUsageAnalysis.cpp
[HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols
2021-10-18 16:53:15 -06:00
AMDGPUResourceUsageAnalysis.h
[AMDGPU] Set number vgprs used in PS shaders based on input registers actually used
2021-10-08 14:24:35 +01:00
AMDGPURewriteOutArguments.cpp
[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
2021-09-20 14:48:50 -07:00
AMDGPUSearchableTables.td
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
AMDGPUSubtarget.cpp
AMDGPU: Account for implicit argument alignment for kernarg segment
2021-11-09 17:48:37 -05:00
AMDGPUSubtarget.h
AMDGPU: Refactor getWavesPerEU to separate flat workgroup size query
2021-09-21 22:57:17 -04:00
AMDGPUTargetMachine.cpp
[InferAddressSpaces] Support assumed addrspaces from addrspace predicates.
2021-11-08 16:51:57 -05:00
AMDGPUTargetMachine.h
[InferAddressSpaces] Support assumed addrspaces from addrspace predicates.
2021-11-08 16:51:57 -05:00
AMDGPUTargetObjectFile.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp
[AMDGPU] Minor cleanup after D109483. NFC.
2021-09-13 10:27:15 +01:00
AMDGPUTargetTransformInfo.h
[Target][CodeGen] Remove default CostKind arguments on inner/impl TTI overrides
2021-09-22 15:28:08 +01:00
AMDGPUUnifyDivergentExitNodes.cpp
[Analysis, Target, Transforms] Construct SmallVector with iterator ranges (NFC)
2021-09-07 09:19:33 -07:00
AMDGPUUnifyMetadata.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDILCFGStructurizer.cpp
[AMDGPU] Use MachineBasicBlock::{predecessors,successors} (NFC)
2021-11-06 19:31:20 -07:00
AMDKernelCodeT.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
BUFInstructions.td
[AMDGPU] Fix upcoming TableGen warnings on unused template arguments. NFC.
2021-09-16 09:07:18 +01:00
CaymanInstructions.td
[AMDGPU] Fix and simplify AMDGPUTargetLowering::LowerUDIVREM
2020-07-08 19:14:49 +01:00
CMakeLists.txt
[AMDGPU] Promote generic pointer kernel arguments into global
2021-10-12 10:07:33 -07:00
DSInstructions.td
[AMDGPU] Add patterns for i8/i16 local atomic load/store
2021-10-18 11:23:10 +02:00
EvergreenInstructions.td
[AMDGPU] Fix upcoming TableGen warnings on unused template arguments. NFC.
2021-09-16 09:07:18 +01:00
EXPInstructions.td
[AMDGPU] Separate out real exp instructions by subtarget. NFC.
2020-11-11 17:13:40 +00:00
FLATInstructions.td
[AMDGPU][MC][GFX10] Enabled dlc for FLAT and GLOBAL atomics
2021-09-21 16:23:20 +03:00
GCNDPPCombine.cpp
[AArch64, AMDGPU] Use make_early_inc_range (NFC)
2021-11-03 09:22:51 -07:00
GCNHazardRecognizer.cpp
[AMDGPU] Set wait state for meta instructions to zero
2021-08-18 01:46:59 -04:00
GCNHazardRecognizer.h
[AMDGPU] Limit runs of fixLdsBranchVmemWARHazard
2021-06-14 22:30:23 +02:00
GCNILPSched.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
GCNIterativeScheduler.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
GCNIterativeScheduler.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
GCNMinRegStrategy.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
GCNNSAReassign.cpp
[AMDGPU] Do not reassign spilled registers
2021-01-27 16:29:05 -08:00
GCNPreRAOptimizations.cpp
[AMDGPU] Fix SGPR checks in S_MOV_B64_IMM_PSEUDO generation.
2021-11-03 09:09:24 +05:30
GCNProcessors.td
[AMDGPU] Add gfx1035 target
2021-06-24 14:32:41 -04:00
GCNRegPressure.cpp
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
GCNRegPressure.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
GCNSchedStrategy.cpp
[AMDGPU] Use max waves for scheduler's initial occupancy target
2021-10-26 15:30:26 -07:00
GCNSchedStrategy.h
[AMDGPU] NFC: Fixing small spelling errors in AMDGPU header files
2021-09-16 13:03:09 -07:00
GCNSubtarget.h
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
InstCombineTables.td
[InstCombine] Move target-specific inst combining
2020-07-22 15:59:49 +02:00
MIMGInstructions.td
[AMDGPU][MC][GFX7][GFX10] Corrected image_atomic_fcmpswap
2021-09-21 18:06:02 +03:00
R600.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600.td
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600AsmPrinter.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600AsmPrinter.h
…
R600ClauseMergePass.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600ControlFlowFinalizer.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Defines.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
R600EmitClauseMarkers.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600ExpandSpecialInstrs.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600FrameLowering.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600FrameLowering.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
R600InstrFormats.td
…
R600InstrInfo.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600InstrInfo.h
[AMDGPU] NFC: Fixing small spelling errors in AMDGPU header files
2021-09-16 13:03:09 -07:00
R600InstrInfo.td
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Instructions.td
[AMDGPU] Fix upcoming TableGen warnings on unused template arguments. NFC.
2021-09-16 09:07:18 +01:00
R600ISelDAGToDAG.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
R600ISelLowering.cpp
[AMDGPU] Fix copying a machine operand
2021-10-11 20:22:47 +01:00
R600ISelLowering.h
Change TargetLowering::canMergeStoresTo() to take a MF instead of DAG.
2021-08-06 12:57:53 -07:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600MachineScheduler.h
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
2020-08-20 17:59:11 +01:00
R600MCInstLower.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
R600OpenCLImageTypeLoweringPass.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600OptimizeVectorRegisters.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Packetizer.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Processors.td
AMDGPU: Remove FeatureLocalMemorySize0
2021-09-02 22:43:01 -04:00
R600RegisterInfo.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600RegisterInfo.h
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
2020-08-20 17:59:11 +01:00
R600RegisterInfo.td
…
R600Schedule.td
…
R600Subtarget.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Subtarget.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600TargetMachine.cpp
Remove the verifyAfter mechanism that was replaced by D111397
2021-10-18 10:26:46 +01:00
R600TargetMachine.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600TargetTransformInfo.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
R600TargetTransformInfo.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[AMDGPU] Set LoopInfo as preserved by SIAnnotateControlFlow
2021-07-08 09:34:43 -07:00
SIDefines.h
[AMDGPU] Support shared literals in FMAMK/FMAAK
2021-10-11 13:09:54 -04:00
SIFixSGPRCopies.cpp
[AMDGPU] Filtering out the inactive lanes bits when lowering copy to SCC
2021-09-21 21:19:31 +03:00
SIFixVGPRCopies.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
SIFoldOperands.cpp
[TII] Remove the MFI argument to convertToThreeAddress. NFC.
2021-09-23 08:58:46 +01:00
SIFormMemoryClauses.cpp
[AMDGPU][NFC] Fix typos in SIFormMemoryClauses description
2021-05-06 07:47:39 -07:00
SIFrameLowering.cpp
[AMDGPU] Do not add debug locations to the code inside prologue
2021-11-04 08:02:41 +05:30
SIFrameLowering.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
SIInsertHardClauses.cpp
[AMDGPU] Ignore KILLs when forming clauses
2021-09-27 16:33:52 +02:00
SIInsertWaitcnts.cpp
[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.
2021-11-04 21:50:18 +01:00
SIInstrFormats.td
[AMDGPU] IsFlatScratch/Global -> FlatScratch/Global
2021-04-09 11:20:31 +02:00
SIInstrInfo.cpp
[AMDGPU] Make getInstSizeInBytes more generic
2021-11-08 10:34:49 -05:00
SIInstrInfo.h
[amdgpu] Handle the case where there is no scavenged register.
2021-10-27 18:37:27 -04:00
SIInstrInfo.td
[AMDGPU] Add patterns for i8/i16 local atomic load/store
2021-10-18 11:23:10 +02:00
SIInstructions.td
[AMDGPU] Enable divergence-driven BFE selection
2021-11-03 23:26:59 +03:00
SIISelLowering.cpp
[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.
2021-11-04 21:50:18 +01:00
SIISelLowering.h
Change TargetLowering::canMergeStoresTo() to take a MF instead of DAG.
2021-08-06 12:57:53 -07:00
SILateBranchLowering.cpp
[AArch64, AMDGPU] Use make_early_inc_range (NFC)
2021-11-03 09:22:51 -07:00
SILoadStoreOptimizer.cpp
Fix building with GCC 12:
2021-11-02 14:28:00 +01:00
SILowerControlFlow.cpp
[AMDGPU] Really preserve LiveVariables in SILowerControlFlow
2021-11-02 15:03:37 +00:00
SILowerI1Copies.cpp
AMDGPU: Treat IMPLICIT_DEF like a constant lanemask source
2021-07-27 11:44:38 -04:00
SILowerSGPRSpills.cpp
[AArch64, AMDGPU] Use make_early_inc_range (NFC)
2021-11-03 09:22:51 -07:00
SIMachineFunctionInfo.cpp
[AMDGPU] Fix global isel for kernels using agprs on gfx90a
2021-10-29 14:23:14 -07:00
SIMachineFunctionInfo.h
[AMDGPU] Allow to use a whole register file on gfx90a for VGPRs
2021-10-21 18:24:34 -07:00
SIMachineScheduler.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
SIMachineScheduler.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
SIMemoryLegalizer.cpp
[AMDGPU] NFC formatting fixes in SIMemoryLegalizer
2021-11-05 09:10:24 +00:00
SIModeRegister.cpp
[AMDGPU] Use MachineBasicBlock::{predecessors,successors} (NFC)
2021-11-06 19:31:20 -07:00
SIOptimizeExecMasking.cpp
[AMDGPU] Move kill lowering to WQM pass and add live mask tracking
2021-02-11 20:31:29 +09:00
SIOptimizeExecMaskingPreRA.cpp
[AMDGPU] SIOptimizeExecMaskingPreRA should check constant bus constraint when folds EXEC copy
2021-03-24 14:14:13 +03:00
SIOptimizeVGPRLiveRange.cpp
[AMDGPU] Improve killed check for vgpr optimization
2021-07-21 15:24:59 +02:00
SIPeepholeSDWA.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
SIPostRABundler.cpp
AMDGPU: Use kill instruction to hint soft clause live ranges
2021-02-26 18:26:40 -05:00
SIPreAllocateWWMRegs.cpp
[AMDGPU] Save WWM registers in functions
2021-04-23 18:09:24 +02:00
SIPreEmitPeephole.cpp
[AMDGPU] Remove set_gpr_idx instructions in conditional blocks
2021-04-30 22:15:45 +01:00
SIProgramInfo.cpp
[AMDGPU] Set rsrc1 flags for graphics shaders
2020-11-04 12:25:41 +01:00
SIProgramInfo.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
SIRegisterInfo.cpp
[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.
2021-11-04 21:50:18 +01:00
SIRegisterInfo.h
[AMDGPU] Do not add debug locations to the code inside prologue
2021-11-04 08:02:41 +05:30
SIRegisterInfo.td
[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.
2021-11-04 21:50:18 +01:00
SISchedule.td
[MCA] Adding an AMDGPUCustomBehaviour implementation.
2021-08-24 13:33:58 -07:00
SIShrinkInstructions.cpp
[AMDGPU] Preserve deadness of vcc when shrinking instructions
2021-10-22 14:22:24 +01:00
SIWholeQuadMode.cpp
[Target] Use make_early_inc_range (NFC)
2021-11-05 09:14:32 -07:00
SMInstructions.td
[AMDGPU] Set IsAtomicRet and IsAtomicNoRet on Real instructions
2021-06-16 12:23:29 +01:00
SOPInstructions.td
[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.
2021-11-04 21:50:18 +01:00
VIInstrFormats.td
…
VOP1Instructions.td
[AMDGPU] Mark all relevant VOP1 instructions rematerializable
2021-07-21 14:05:32 -07:00
VOP2Instructions.td
[AMDGPU] Add constrained shift pattern matches.
2021-10-26 19:07:19 +05:30
VOP3Instructions.td
[AMDGPU] Add constrained shift pattern matches.
2021-10-26 19:07:19 +05:30
VOP3PInstructions.td
[AMDGPU] Add constrained shift pattern matches.
2021-10-26 19:07:19 +05:30
VOPCInstructions.td
[AMDGPU] Set SALU, VALU and other instruction type flags on Real instructions
2021-06-16 13:36:02 +01:00
VOPInstructions.td
[AMDGPU] Add constrained shift pattern matches.
2021-10-26 19:07:19 +05:30