Julian Nagele 8280070a73

[VectorCombine] Try to scalarize vector loads feeding bitcast instructions. (#164682) ...

This change aims to convert vector loads to scalar loads, if they are
only converted to scalars after anyway.

alive2 proof: https://alive2.llvm.org/ce/z/U_rvht

2025-11-12 15:35:03 +00:00

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AArch64

[VectorCombine] Try to scalarize vector loads feeding bitcast instructions. (#164682)

2025-11-12 15:35:03 +00:00

AMDGPU

[AMDGPU] NFC, move testcase, only test output of promote-alloca with vector-combine (#166289)

2025-11-03 22:21:26 -05:00

ARM

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Hexagon

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PowerPC

[VectorCombine] Fix scalarizeExtExtract for big-endian (#157962)

2025-09-15 10:08:16 +00:00

RISCV

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SPIRV

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X86

[VectorCombine] support mismatching extract/insert indices for foldInsExtFNeg (#126408)

2025-11-07 18:35:40 +00:00

alias.ll

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binop-scalarize.ll

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fold-binop-of-reductions.ll

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fold-shuffle-chains-to-reduce.ll

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intrinsic-scalarize.ll

[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)

2025-09-17 11:44:47 +01:00

load-insert-store.ll

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load-shufflevector.ll

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narrow-phi-of-shuffles.ll

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pr88796.ll

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pr132563.ll

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pr157335.ll

[VectorCombine] foldSelectShuffle - early-out cases where the max vector register width isn't large enough (#157430)

2025-09-08 12:04:23 +00:00

unary-op-scalarize.ll

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