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llvm-project/llvm/test/CodeGen
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Pierre van Houtryve eccdedd6f7 [AMDGPU] Autogenerate icmp codegen test 
Switch to autogenerated tests so we can use the same test for GISel and DAGIsel.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D136446
2022-10-24 06:37:50 +00:00
..
AArch64
Revert "[DAGCombiner] Fold (mul (sra X, BW-1), Y) -> (neg (and (sra X, BW-1), Y))"
2022-10-22 22:50:43 -07:00
AMDGPU
[AMDGPU] Autogenerate icmp codegen test
2022-10-24 06:37:50 +00:00
ARC
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ARM
[ARM] Fix the type for v4f16 duplane
2022-10-21 10:10:35 +01:00
AVR
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BPF
[BPF] Add (failing) testcase for Issue #57872
2022-10-16 18:16:18 +01:00
CSKY
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DirectX
[HLSL] Remove unused frontend-generated ID
2022-10-21 12:41:09 -05:00
Generic
[VP] Add IR expansion for vp.icmp and vp.fcmp
2022-10-05 08:07:39 +01:00
Hexagon
[Hexagon] Improve handling of 32-bit mulh/mul_lohi on HVX
2022-10-22 15:08:27 -07:00
Inputs
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Lanai
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LoongArch
[LoongArch] Stack realignment support
2022-10-21 17:30:29 +08:00
M68k
[M68k][NFC] Use OS and ABI agnostic triple in codegen tests
2022-10-23 15:26:13 -07:00
Mips
[CodeGen] Using ZExt for extractelement indices.
2022-10-15 15:45:35 -07:00
MIR
MachineVerifier: Verify REG_SEQUENCE
2022-09-22 09:51:15 -04:00
MLRegalloc
[mlgo] Make regalloc extra features logging test more robust
2022-10-21 18:49:29 -07:00
MSP430
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NVPTX
[NVPTX] Support neg{.ftz} for f16 and f16x2
2022-10-13 10:48:33 -07:00
PowerPC
Revert "[DAGCombiner] Fold (mul (sra X, BW-1), Y) -> (neg (and (sra X, BW-1), Y))"
2022-10-22 22:50:43 -07:00
RISCV
[RISCV] Make selectShiftMask look for negate opportunities after looking through AND.
2022-10-23 14:23:13 -07:00
SPARC
[SPARC] Make calls to function with big return values work
2022-10-18 00:01:55 +00:00
SPIRV
[SPIR-V] Add get_image_num_mip_levels implementation
2022-10-19 22:29:16 +02:00
SystemZ
[SystemZ] Revert migration of SystemZ/Large/branch-01.ll
2022-10-12 14:24:04 +00:00
Thumb
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Thumb2
Revert "[DAGCombiner] Fold (mul (sra X, BW-1), Y) -> (neg (and (sra X, BW-1), Y))"
2022-10-22 22:50:43 -07:00
VE
[VE] Change the way to lower selectcc
2022-10-20 08:08:59 +09:00
WebAssembly
[CodeGen] Using ZExt for extractelement indices.
2022-10-15 15:45:35 -07:00
WinCFGuard
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WinEH
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X86
[X86] Add abs(sext_inreg(x)) test coverage for Issue #43370
2022-10-23 18:17:19 +01:00
XCore
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