Sanjay Patel 8985755762 [InstSimplify] add limit folds for fmin/fmax ...

If the constant operand is the opposite of the min/max value,
then the result must be the other value.

This is based on the similar codegen transform proposed in:
D87571

2020-09-15 10:58:44 -04:00

..

addsub.ll

[PhaseOrdering] adjust test to use default alias analysis with new pass manager; NFC

2020-05-24 11:28:15 -04:00

horiz-math.ll

[SLP] Fix order of insertelement/insertvalue seed operands

2020-08-06 22:09:24 +03:00

lit.local.cfg

[PhaseOrdering] add test for missing vector/CSE transforms (PR45015); NFC

2020-02-25 09:13:49 -05:00

masked-memory-ops.ll

[X86] Add test cases for PR11210

2020-09-13 13:38:05 +01:00

scalarization.ll

[VectorCombine] scalarizeBinop - support an all-constant src vector operand

2020-06-09 19:02:05 +01:00

shuffle.ll

[VectorCombine] add helper to replace uses and rename

2020-06-22 09:58:49 -04:00

vdiv.ll

[PhaseOrdering] add test for hoisting/CSE (PR46115); NFC

2020-05-31 10:34:18 -04:00

vector-reductions-expanded.ll

[InstSimplify] add limit folds for fmin/fmax

2020-09-15 10:58:44 -04:00

vector-reductions.ll

[VectorCombine] try to form vector compare and binop to eliminate scalar ops

2020-06-29 10:38:52 -04:00