bbea64250f
This re-architects the RISCV relocation handling to bring the implementation closer in line with the implementation in binutils. We would previously aggressively resolve the relocation. With this restructuring, we always will emit a paired relocation for any symbolic difference of the type of S±T[±C] where S and T are labels and C is a constant. GAS has a special target hook controlled by `RELOC_EXPANSION_POSSIBLE` which indicates that a fixup may be expanded into multiple relocations. This is used by the RISCV backend to always emit a paired relocation - either ADD[WIDTH] + SUB[WIDTH] for text relocations or SET[WIDTH] + SUB[WIDTH] for a debug info relocation. Irrespective of whether linker relaxation support is enabled, symbolic difference is always emitted as a paired relocation. This change also sinks the target specific behaviour down into the target specific area rather than exposing it to the shared relocation handling. In the process, we also sink the "special" handling for debug information down into the RISCV target. Although this improves the path for the other targets, this is not necessarily entirely ideal either. The changes in the debug info emission could be done through another type of hook as this functionality would be required by any other target which wishes to do linker relaxation. However, as there are no other targets in LLVM which currently do this, this is a reasonable thing to do until such time as the code needs to be shared. Improve the handling of the relocation (and add a reduced test case from the Linux kernel) to ensure that we handle complex expressions for symbolic difference. This ensures that we correct relocate symbols with the adddends normalized and associated with the addition portion of the paired relocation. This change also addresses some review comments from Alex Bradbury about the relocations meant for use in the DWARF CFA being named incorrectly (using ADD6 instead of SET6) in the original change which introduced the relocation type. This resolves the issues with the symbolic difference emission sufficiently to enable building the Linux kernel with clang+IAS+lld (without linker relaxation). Resolves PR50153, PR50156! Fixes: ClangBuiltLinux/linux#1023, ClangBuiltLinux/linux#1143 Reviewed By: nickdesaulniers, maskray Differential Revision: https://reviews.llvm.org/D103539
110 lines
4.3 KiB
C++
110 lines
4.3 KiB
C++
//===-- RISCVAsmBackend.h - RISCV Assembler Backend -----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVASMBACKEND_H
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#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVASMBACKEND_H
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#include "MCTargetDesc/RISCVBaseInfo.h"
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#include "MCTargetDesc/RISCVFixupKinds.h"
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#include "MCTargetDesc/RISCVMCTargetDesc.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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namespace llvm {
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class MCAssembler;
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class MCObjectTargetWriter;
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class raw_ostream;
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class RISCVAsmBackend : public MCAsmBackend {
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const MCSubtargetInfo &STI;
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uint8_t OSABI;
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bool Is64Bit;
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bool ForceRelocs = false;
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const MCTargetOptions &TargetOptions;
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RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown;
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public:
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RISCVAsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit,
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const MCTargetOptions &Options)
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: MCAsmBackend(support::little), STI(STI), OSABI(OSABI), Is64Bit(Is64Bit),
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TargetOptions(Options) {
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TargetABI = RISCVABI::computeTargetABI(
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STI.getTargetTriple(), STI.getFeatureBits(), Options.getABIName());
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RISCVFeatures::validate(STI.getTargetTriple(), STI.getFeatureBits());
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}
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~RISCVAsmBackend() override {}
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void setForceRelocs() { ForceRelocs = true; }
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// Return Size with extra Nop Bytes for alignment directive in code section.
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bool shouldInsertExtraNopBytesForCodeAlign(const MCAlignFragment &AF,
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unsigned &Size) override;
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// Insert target specific fixup type for alignment directive in code section.
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bool shouldInsertFixupForCodeAlign(MCAssembler &Asm,
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const MCAsmLayout &Layout,
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MCAlignFragment &AF) override;
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bool evaluateTargetFixup(const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFixup &Fixup, const MCFragment *DF,
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const MCValue &Target, uint64_t &Value,
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bool &WasForced) override;
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void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target, MutableArrayRef<char> Data,
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uint64_t Value, bool IsResolved,
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const MCSubtargetInfo *STI) const override;
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std::unique_ptr<MCObjectTargetWriter>
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createObjectTargetWriter() const override;
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bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target) override;
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bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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const MCRelaxableFragment *DF,
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const MCAsmLayout &Layout) const override {
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llvm_unreachable("Handled by fixupNeedsRelaxationAdvanced");
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}
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bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved,
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uint64_t Value,
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const MCRelaxableFragment *DF,
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const MCAsmLayout &Layout,
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const bool WasForced) const override;
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unsigned getNumFixupKinds() const override {
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return RISCV::NumTargetFixupKinds;
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}
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Optional<MCFixupKind> getFixupKind(StringRef Name) const override;
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
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bool mayNeedRelaxation(const MCInst &Inst,
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const MCSubtargetInfo &STI) const override;
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unsigned getRelaxedOpcode(unsigned Op) const;
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void relaxInstruction(MCInst &Inst,
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const MCSubtargetInfo &STI) const override;
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bool relaxDwarfLineAddr(MCDwarfLineAddrFragment &DF, MCAsmLayout &Layout,
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bool &WasRelaxed) const override;
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bool relaxDwarfCFA(MCDwarfCallFrameFragment &DF, MCAsmLayout &Layout,
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bool &WasRelaxed) const override;
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bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
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const MCTargetOptions &getTargetOptions() const { return TargetOptions; }
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RISCVABI::ABI getTargetABI() const { return TargetABI; }
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};
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}
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#endif
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