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llvm-project/llvm/test/MC/Disassembler/PowerPC
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Lei Huang 64a15817a0 [PowerPC]Add addex instruction definition and MC tests
Add td definitions and asm/disasm tests for the addex instruction introduced in
ISA 3.0.

Reviewed By: nemanjai, amyk, NeHuang

Differential Revision: https://reviews.llvm.org/D106666
2021-07-26 14:55:38 -05:00
..
dcbt.txt
…
lit.local.cfg
…
p10insts.txt
…
ppc32-extpid-e500.txt
…
ppc64-encoding-4xx.txt
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ppc64-encoding-6xx.txt
…
ppc64-encoding-bookII.txt
[PowerPC] Export 16 byte load-store instructions
2021-06-15 01:56:10 +00:00
ppc64-encoding-bookIII.txt
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ppc64-encoding-e500.txt
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ppc64-encoding-ext.txt
[PowerPC] Disable more extended mne on AIX
2021-03-04 21:13:37 +00:00
ppc64-encoding-fp.txt
…
ppc64-encoding-ISA31-invalid.txt
…
ppc64-encoding-ISA31.txt
[PowerPC] Add ROP Protection Instructions for PowerPC
2021-04-15 11:38:38 -05:00
ppc64-encoding-p8htm.txt
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ppc64-encoding-p8vector.txt
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ppc64-encoding-p9vector.txt
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ppc64-encoding-vmx.txt
…
ppc64-encoding.txt
[PowerPC]Add addex instruction definition and MC tests
2021-07-26 14:55:38 -05:00
ppc64-operands.txt
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ppc64le-encoding.txt
[PowerPC]Add addex instruction definition and MC tests
2021-07-26 14:55:38 -05:00
vsx.txt
…
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