llvm-project

absaddr-store.ll

Hexagon: Use multiclass for absolute addressing mode stores.

2013-02-05 18:15:34 +00:00

args.ll

Use multiclass to define store instructions with base+immediate offset

2012-12-05 19:32:03 +00:00

cmp_pred_reg.ll

Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle

2013-02-05 19:20:45 +00:00

cmp_pred.ll

Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle

2013-02-05 19:20:45 +00:00

cmp-to-genreg.ll

Hexagon: Add V4 compare instructions. Enable relationship mapping

2013-02-05 16:42:24 +00:00

cmp-to-predreg.ll

Hexagon: Add V4 compare instructions. Enable relationship mapping

2013-02-05 16:42:24 +00:00

cmpb_pred.ll

Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle

2013-02-05 19:20:45 +00:00

combine_ir.ll

Hexagon: Add V4 combine instructions and some more Def Pats for V2.

2013-02-04 15:52:56 +00:00

combine.ll

Enable all Hexagon tests.

2012-05-15 16:13:12 +00:00

convertdptoint.ll

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convertdptoll.ll

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convertsptoint.ll

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convertsptoll.ll

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dadd.ll

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dmul.ll

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double.ll

Enable all Hexagon tests.

2012-05-15 16:13:12 +00:00

doubleconvert-ieee-rnd-near.ll

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dsub.ll

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dualstore.ll

Use multiclass to define store instructions with base+immediate offset

2012-12-05 19:32:03 +00:00

fadd.ll

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fcmp.ll

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float.ll

Enable all Hexagon tests.

2012-05-15 16:13:12 +00:00

floatconvert-ieee-rnd-near.ll

Enable all Hexagon tests.

2012-05-15 16:13:12 +00:00

fmul.ll

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frame.ll

Enable all Hexagon tests.

2012-05-15 16:13:12 +00:00

fsub.ll

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fusedandshift.ll

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hwloop-cleanup.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-const.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-dbg.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-le.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-lt1.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-lt.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-ne.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

idxload-with-zero-offset.ll

Hexagon: Test case to confirm generation of indexed loads with zero offset.

2013-02-01 16:40:06 +00:00

lit.local.cfg

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macint.ll

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mpy.ll

Enable all Hexagon tests.

2012-05-15 16:13:12 +00:00

newvaluejump2.ll

Support for Hexagon feature, New Value Jump.

2012-05-12 05:10:30 +00:00

newvaluejump.ll

Remove extra MayLoad/MayStore flags from atomic_load/store.

2012-08-28 03:11:32 +00:00

newvaluestore.ll

Porting Hexagon MI Scheduler to the new API.

2012-09-04 14:49:56 +00:00

opt-fabs.ll

Add test triples to fix win32 failures. Revert workaround from r161292.

2012-08-08 20:31:37 +00:00

opt-fneg.ll

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postinc-load.ll

In hexagon convertToHardwareLoop, don't deref end() iterator

2012-12-07 21:03:15 +00:00

postinc-store.ll

Hexagon: Add testcase for post-increment store instructions.

2013-02-05 18:23:51 +00:00

pred-absolute-store.ll

Hexagon: Add support to generate predicated absolute addressing mode

2013-02-12 16:06:23 +00:00

remove_lsr.ll

LLVM Bug Fix 13709: Remove needless lsr(Rp, #32 ) instruction access the

2012-09-05 16:01:40 +00:00

simpletailcall.ll

[Hexagon] Don't mark callee saved registers as clobbered by a tail call

2012-08-13 19:54:01 +00:00

static.ll

Porting Hexagon MI Scheduler to the new API.

2012-09-04 14:49:56 +00:00

struct_args_large.ll

Enable all Hexagon tests.

2012-05-15 16:13:12 +00:00

struct_args.ll

Hexagon: Add V4 combine instructions and some more Def Pats for V2.

2013-02-04 15:52:56 +00:00

vaddh.ll

Enable all Hexagon tests.

2012-05-15 16:13:12 +00:00

validate-offset.ll

Add indexed load/store instructions for offset validation check.

2013-01-17 18:42:37 +00:00