
`Data` now references the first byte of the fixup offset within the current fragment. MCAssembler::layout asserts that the fixup offset is within either the fixed-size content or the optional variable-size tail, as this is the most the generic code can validate without knowing the target-specific fixup size. Many backends applyFixup assert ``` assert(Offset + Size <= F.getSize() && "Invalid fixup offset!"); ``` This refactoring allows a subsequent change to move the fixed-size content outside of MCSection::ContentStorage, fixing the -fsanitize=pointer-overflow issue of #150846 Pull Request: https://github.com/llvm/llvm-project/pull/151724
351 lines
12 KiB
C++
351 lines
12 KiB
C++
//===-- CSKYAsmBackend.cpp - CSKY Assembler Backend -----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "CSKYAsmBackend.h"
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#include "MCTargetDesc/CSKYMCTargetDesc.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/Debug.h"
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#define DEBUG_TYPE "csky-asmbackend"
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using namespace llvm;
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std::unique_ptr<MCObjectTargetWriter>
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CSKYAsmBackend::createObjectTargetWriter() const {
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return createCSKYELFObjectWriter();
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}
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MCFixupKindInfo CSKYAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
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static llvm::DenseMap<unsigned, MCFixupKindInfo> Infos = {
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{CSKY::Fixups::fixup_csky_addr32, {"fixup_csky_addr32", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_addr_hi16, {"fixup_csky_addr_hi16", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_addr_lo16, {"fixup_csky_addr_lo16", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_pcrel_imm16_scale2,
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{"fixup_csky_pcrel_imm16_scale2", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_pcrel_uimm16_scale4,
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{"fixup_csky_pcrel_uimm16_scale4", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_pcrel_uimm8_scale4,
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{"fixup_csky_pcrel_uimm8_scale4", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_pcrel_imm26_scale2,
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{"fixup_csky_pcrel_imm26_scale2", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_pcrel_imm18_scale2,
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{"fixup_csky_pcrel_imm18_scale2", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_got32, {"fixup_csky_got32", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_got_imm18_scale4,
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{"fixup_csky_got_imm18_scale4", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_gotoff, {"fixup_csky_gotoff", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_gotpc, {"fixup_csky_gotpc", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_plt32, {"fixup_csky_plt32", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_plt_imm18_scale4,
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{"fixup_csky_plt_imm18_scale4", 0, 32, 0}},
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{CSKY::Fixups::fixup_csky_pcrel_imm10_scale2,
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{"fixup_csky_pcrel_imm10_scale2", 0, 16, 0}},
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{CSKY::Fixups::fixup_csky_pcrel_uimm7_scale4,
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{"fixup_csky_pcrel_uimm7_scale4", 0, 16, 0}},
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{CSKY::Fixups::fixup_csky_doffset_imm18,
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{"fixup_csky_doffset_imm18", 0, 18, 0}},
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{CSKY::Fixups::fixup_csky_doffset_imm18_scale2,
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{"fixup_csky_doffset_imm18_scale2", 0, 18, 0}},
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{CSKY::Fixups::fixup_csky_doffset_imm18_scale4,
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{"fixup_csky_doffset_imm18_scale4", 0, 18, 0}}};
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assert(Infos.size() == CSKY::NumTargetFixupKinds &&
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"Not all fixup kinds added to Infos array");
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if (mc::isRelocation(Kind))
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return {};
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if (Kind < FirstTargetFixupKind)
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return MCAsmBackend::getFixupKindInfo(Kind);
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return Infos[Kind];
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}
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static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
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MCContext &Ctx) {
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switch (Fixup.getKind()) {
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default:
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llvm_unreachable("Unknown fixup kind!");
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case CSKY::fixup_csky_got32:
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case CSKY::fixup_csky_got_imm18_scale4:
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case CSKY::fixup_csky_gotoff:
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case CSKY::fixup_csky_gotpc:
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case CSKY::fixup_csky_plt32:
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case CSKY::fixup_csky_plt_imm18_scale4:
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llvm_unreachable("Relocation should be unconditionally forced\n");
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case FK_Data_1:
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case FK_Data_2:
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case FK_Data_4:
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case FK_Data_8:
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return Value;
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case CSKY::fixup_csky_addr32:
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return Value & 0xffffffff;
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case CSKY::fixup_csky_pcrel_imm16_scale2:
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if (!isIntN(17, Value))
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Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
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if (Value & 0x1)
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Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
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return (Value >> 1) & 0xffff;
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case CSKY::fixup_csky_pcrel_uimm16_scale4:
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if (!isUIntN(18, Value))
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Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
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if (Value & 0x3)
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Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned.");
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return (Value >> 2) & 0xffff;
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case CSKY::fixup_csky_pcrel_imm26_scale2:
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if (!isIntN(27, Value))
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Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
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if (Value & 0x1)
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Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
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return (Value >> 1) & 0x3ffffff;
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case CSKY::fixup_csky_pcrel_imm18_scale2:
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if (!isIntN(19, Value))
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Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
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if (Value & 0x1)
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Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
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return (Value >> 1) & 0x3ffff;
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case CSKY::fixup_csky_pcrel_uimm8_scale4: {
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if (!isUIntN(10, Value))
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Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
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if (Value & 0x3)
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Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned.");
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unsigned IMM4L = (Value >> 2) & 0xf;
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unsigned IMM4H = (Value >> 6) & 0xf;
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Value = (IMM4H << 21) | (IMM4L << 4);
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return Value;
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}
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case CSKY::fixup_csky_pcrel_imm10_scale2:
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if (!isIntN(11, Value))
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Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
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if (Value & 0x1)
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Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
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return (Value >> 1) & 0x3ff;
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case CSKY::fixup_csky_pcrel_uimm7_scale4:
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if ((Value >> 2) > 0xfe)
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Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
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if (Value & 0x3)
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Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned.");
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if ((Value >> 2) <= 0x7f) {
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unsigned IMM5L = (Value >> 2) & 0x1f;
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unsigned IMM2H = (Value >> 7) & 0x3;
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Value = (1 << 12) | (IMM2H << 8) | IMM5L;
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} else {
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unsigned IMM5L = (~Value >> 2) & 0x1f;
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unsigned IMM2H = (~Value >> 7) & 0x3;
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Value = (IMM2H << 8) | IMM5L;
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}
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return Value;
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}
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}
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bool CSKYAsmBackend::fixupNeedsRelaxationAdvanced(const MCFragment &,
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const MCFixup &Fixup,
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const MCValue &,
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uint64_t Value,
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bool Resolved) const {
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// Return true if the symbol is unresolved.
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if (!Resolved)
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return true;
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int64_t Offset = int64_t(Value);
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switch (Fixup.getKind()) {
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default:
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return false;
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case CSKY::fixup_csky_pcrel_imm10_scale2:
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return !isShiftedInt<10, 1>(Offset);
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case CSKY::fixup_csky_pcrel_imm16_scale2:
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return !isShiftedInt<16, 1>(Offset);
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case CSKY::fixup_csky_pcrel_imm26_scale2:
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return !isShiftedInt<26, 1>(Offset);
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case CSKY::fixup_csky_pcrel_uimm7_scale4:
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return ((Value >> 2) > 0xfe) || (Value & 0x3);
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}
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}
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std::optional<bool> CSKYAsmBackend::evaluateFixup(const MCFragment &F,
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MCFixup &Fixup, MCValue &,
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uint64_t &Value) {
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// For a few PC-relative fixups, offsets need to be aligned down. We
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// compensate here because the default handler's `Value` decrement doesn't
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// account for this alignment.
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switch (Fixup.getKind()) {
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case CSKY::fixup_csky_pcrel_uimm16_scale4:
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case CSKY::fixup_csky_pcrel_uimm8_scale4:
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case CSKY::fixup_csky_pcrel_uimm7_scale4:
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Value = (Asm->getFragmentOffset(F) + Fixup.getOffset()) % 4;
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}
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return {};
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}
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void CSKYAsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
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const MCValue &Target, uint8_t *Data,
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uint64_t Value, bool IsResolved) {
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if (IsResolved && shouldForceRelocation(Fixup, Target))
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IsResolved = false;
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maybeAddReloc(F, Fixup, Target, Value, IsResolved);
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MCFixupKind Kind = Fixup.getKind();
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if (mc::isRelocation(Kind))
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return;
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MCContext &Ctx = getContext();
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MCFixupKindInfo Info = getFixupKindInfo(Kind);
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if (!Value)
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return; // Doesn't change encoding.
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// Apply any target-specific value adjustments.
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Value = adjustFixupValue(Fixup, Value, Ctx);
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// Shift the value into position.
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Value <<= Info.TargetOffset;
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unsigned NumBytes = alignTo(Info.TargetSize + Info.TargetOffset, 8) / 8;
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assert(Fixup.getOffset() + NumBytes <= F.getSize() &&
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"Invalid fixup offset!");
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// For each byte of the fragment that the fixup touches, mask in the
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// bits from the fixup value.
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bool IsLittleEndian = (Endian == llvm::endianness::little);
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bool IsInstFixup = (Kind >= FirstTargetFixupKind);
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if (IsLittleEndian && IsInstFixup && (NumBytes == 4)) {
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Data[0] |= uint8_t((Value >> 16) & 0xff);
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Data[1] |= uint8_t((Value >> 24) & 0xff);
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Data[2] |= uint8_t(Value & 0xff);
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Data[3] |= uint8_t((Value >> 8) & 0xff);
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} else {
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for (unsigned I = 0; I != NumBytes; I++) {
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unsigned Idx = IsLittleEndian ? I : (NumBytes - 1 - I);
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Data[Idx] |= uint8_t((Value >> (I * 8)) & 0xff);
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}
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}
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}
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bool CSKYAsmBackend::mayNeedRelaxation(unsigned Opcode, ArrayRef<MCOperand>,
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const MCSubtargetInfo &STI) const {
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switch (Opcode) {
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default:
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return false;
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case CSKY::JBR32:
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case CSKY::JBT32:
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case CSKY::JBF32:
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case CSKY::JBSR32:
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if (!STI.hasFeature(CSKY::Has2E3))
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return false;
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return true;
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case CSKY::JBR16:
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case CSKY::JBT16:
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case CSKY::JBF16:
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case CSKY::LRW16:
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case CSKY::BR16:
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return true;
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}
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}
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bool CSKYAsmBackend::shouldForceRelocation(const MCFixup &Fixup,
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const MCValue &Target /*STI*/) {
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if (Target.getSpecifier())
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return true;
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switch (Fixup.getKind()) {
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default:
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break;
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case CSKY::fixup_csky_doffset_imm18:
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case CSKY::fixup_csky_doffset_imm18_scale2:
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case CSKY::fixup_csky_doffset_imm18_scale4:
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return true;
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}
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return false;
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}
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bool CSKYAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
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uint64_t Value) const {
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return false;
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}
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void CSKYAsmBackend::relaxInstruction(MCInst &Inst,
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const MCSubtargetInfo &STI) const {
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MCInst Res;
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switch (Inst.getOpcode()) {
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default:
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LLVM_DEBUG(Inst.dump());
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llvm_unreachable("Opcode not expected!");
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case CSKY::LRW16:
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Res.setOpcode(CSKY::LRW32);
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Res.addOperand(Inst.getOperand(0));
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Res.addOperand(Inst.getOperand(1));
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break;
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case CSKY::BR16:
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Res.setOpcode(CSKY::BR32);
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Res.addOperand(Inst.getOperand(0));
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break;
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case CSKY::JBSR32:
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Res.setOpcode(CSKY::JSRI32);
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Res.addOperand(Inst.getOperand(1));
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break;
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case CSKY::JBR32:
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Res.setOpcode(CSKY::JMPI32);
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Res.addOperand(Inst.getOperand(1));
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break;
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case CSKY::JBT32:
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case CSKY::JBF32:
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Res.setOpcode(Inst.getOpcode() == CSKY::JBT32 ? CSKY::JBT_E : CSKY::JBF_E);
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Res.addOperand(Inst.getOperand(0));
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Res.addOperand(Inst.getOperand(1));
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Res.addOperand(Inst.getOperand(2));
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break;
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case CSKY::JBR16:
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Res.setOpcode(CSKY::JBR32);
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Res.addOperand(Inst.getOperand(0));
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Res.addOperand(Inst.getOperand(1));
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break;
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case CSKY::JBT16:
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case CSKY::JBF16:
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// ck801
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unsigned opcode;
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if (STI.hasFeature(CSKY::HasE2))
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opcode = Inst.getOpcode() == CSKY::JBT16 ? CSKY::JBT32 : CSKY::JBF32;
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else
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opcode = Inst.getOpcode() == CSKY::JBT16 ? CSKY::JBT_E : CSKY::JBF_E;
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Res.setOpcode(opcode);
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Res.addOperand(Inst.getOperand(0));
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Res.addOperand(Inst.getOperand(1));
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Res.addOperand(Inst.getOperand(2));
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break;
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}
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Inst = std::move(Res);
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}
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bool CSKYAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
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const MCSubtargetInfo *STI) const {
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OS.write_zeros(Count);
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return true;
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}
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MCAsmBackend *llvm::createCSKYAsmBackend(const Target &T,
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const MCSubtargetInfo &STI,
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const MCRegisterInfo &MRI,
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const MCTargetOptions &Options) {
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return new CSKYAsmBackend(STI, Options);
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}
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