
Fixes https://github.com/llvm/llvm-project/issues/61400 Added test case in llvm/test/CodeGen/WebAssembly/memcmp-expand.ll
109 lines
4.1 KiB
C++
109 lines
4.1 KiB
C++
//==- WebAssemblyTargetTransformInfo.h - WebAssembly-specific TTI -*- C++ -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file a TargetTransformInfoImplBase conforming object specific
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/// to the WebAssembly target machine.
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///
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/// It uses the target's detailed information to provide more precise answers to
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/// certain TTI queries, while letting the target independent and default TTI
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/// implementations handle the rest.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETTRANSFORMINFO_H
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#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETTRANSFORMINFO_H
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#include "WebAssemblyTargetMachine.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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#include <algorithm>
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namespace llvm {
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class WebAssemblyTTIImpl final : public BasicTTIImplBase<WebAssemblyTTIImpl> {
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typedef BasicTTIImplBase<WebAssemblyTTIImpl> BaseT;
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typedef TargetTransformInfo TTI;
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friend BaseT;
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const WebAssemblySubtarget *ST;
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const WebAssemblyTargetLowering *TLI;
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const WebAssemblySubtarget *getST() const { return ST; }
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const WebAssemblyTargetLowering *getTLI() const { return TLI; }
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public:
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WebAssemblyTTIImpl(const WebAssemblyTargetMachine *TM, const Function &F)
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: BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
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TLI(ST->getTargetLowering()) {}
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/// \name Scalar TTI Implementations
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/// @{
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// TODO: Implement more Scalar TTI for WebAssembly
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TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) const override;
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void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
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TTI::UnrollingPreferences &UP,
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OptimizationRemarkEmitter *ORE) const override;
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/// @}
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/// \name Vector TTI Implementations
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/// @{
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bool enableInterleavedAccessVectorization() const override { return true; }
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unsigned getNumberOfRegisters(unsigned ClassID) const override;
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TypeSize
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getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override;
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InstructionCost getArithmeticInstrCost(
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unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
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TTI::OperandValueInfo Op1Info = {TTI::OK_AnyValue, TTI::OP_None},
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TTI::OperandValueInfo Op2Info = {TTI::OK_AnyValue, TTI::OP_None},
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ArrayRef<const Value *> Args = {},
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const Instruction *CxtI = nullptr) const override;
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InstructionCost
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getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
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TTI::CastContextHint CCH, TTI::TargetCostKind CostKind,
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const Instruction *I = nullptr) const override;
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TTI::MemCmpExpansionOptions
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enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const override;
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InstructionCost getMemoryOpCost(
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unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
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TTI::TargetCostKind CostKind,
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TTI::OperandValueInfo OpInfo = {TTI::OK_AnyValue, TTI::OP_None},
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const Instruction *I = nullptr) const override;
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using BaseT::getVectorInstrCost;
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InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
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TTI::TargetCostKind CostKind,
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unsigned Index, const Value *Op0,
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const Value *Op1) const override;
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InstructionCost getPartialReductionCost(
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unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
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ElementCount VF, TTI::PartialReductionExtendKind OpAExtend,
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TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
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TTI::TargetCostKind CostKind) const override;
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TTI::ReductionShuffle
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getPreferredExpandedReductionShuffle(const IntrinsicInst *II) const override;
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bool supportsTailCalls() const override;
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bool isProfitableToSinkOperands(Instruction *I,
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SmallVectorImpl<Use *> &Ops) const override;
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/// @}
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};
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} // end namespace llvm
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#endif
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