Trevor Gross 919021b0df
[Arm64EC] Add support for half (#152843)
`f16` is passed and returned in vector registers on both x86 on AArch64,
the same calling convention as `f32`, so it is a straightforward type to
support. The calling convention support already exists, added as part of
a6065f0fa55a ("Arm64EC entry/exit thunks, consolidated. (#79067)").
Thus, add mangling and remove the error in order to make `half` work.

MSVC does not yet support `_Float16`, so for now this will remain an
LLVM-only extension.

Fixes the `f16` portion of
https://github.com/llvm/llvm-project/issues/94434
2025-08-12 14:15:52 -07:00
..