Simon Pilgrim ffe13960b5 [InstCombine] Fold (A & 2^C1) + A => A & (2^C1 - 1) iff bit C1 in A is a sign bit (PR21929) ...

Alive2: https://alive2.llvm.org/ce/z/Ygq26C

This is the final missing fold to handle the modulo2 simplification: https://github.com/llvm/llvm-project/issues/22303

Fixes #22303

Differential Revision: https://reviews.llvm.org/D123374

2022-04-22 16:59:02 +01:00

..

CMakeLists.txt

llvmbuildectomy - replace llvm-build by plain cmake

2020-11-13 10:35:24 +01:00

InstCombineAddSub.cpp

[InstCombine] Fold (A & 2^C1) + A => A & (2^C1 - 1) iff bit C1 in A is a sign bit (PR21929)

2022-04-22 16:59:02 +01:00

InstCombineAndOrXor.cpp

[InstCombine] Extract code for or of icmp eq zero and icmp fold (NFC)

2022-04-22 16:48:59 +02:00

InstCombineAtomicRMW.cpp

Cleanup includes: Transform/Scalar

2022-03-03 07:56:34 +01:00

InstCombineCalls.cpp

[InstCombine] Remove dead code (NFC)

2022-04-21 15:53:53 +02:00

InstCombineCasts.cpp

[InstCombine] Don't look through bitcast from vector in collectInsertionElements.

2022-04-20 09:15:32 -07:00

InstCombineCompares.cpp

[InstCombine] Fold srem(X, PowerOf2) == C into (X & Mask) == C for positive C

2022-04-03 03:57:05 +00:00

InstCombineInternal.h

[InstCombine] Merge foldAndOfICmps() and foldOrOfICmps() (NFCI)

2022-04-22 12:48:03 +02:00

InstCombineLoadStoreAlloca.cpp

Cleanup includes: Transform/Scalar

2022-03-03 07:56:34 +01:00

InstCombineMulDivRem.cpp

[InstCombine] fold more constant remainder to select-of-constants remainder

2022-04-12 09:40:56 +08:00

InstCombineNegator.cpp

[InstCombine] Fold sub(Y,and(lshr(X,C),1)) --> add(ashr(shl(X,(BW-1)-C),BW-1),Y) (PR53610)

2022-02-15 13:24:20 +00:00

InstCombinePHI.cpp

Reapply [InstCombine] Support switch in phi to cond fold

2022-03-17 10:03:09 +01:00

InstCombineSelect.cpp

[InstCombine] canonicalize select with signbit test

2022-04-14 14:28:47 -04:00

InstCombineShifts.cpp

[InstCombine] C0 <<{nsw, nuw} (X - C1) --> (C0 >> C1) << X (2nd try)

2022-04-21 16:18:46 -04:00

InstCombineSimplifyDemanded.cpp

[InstCombine] SimplifyDemandedUseBits - allow and(srem(X,Pow2),C) -> and(X,C) to work on vector types

2022-04-07 15:24:45 +01:00

InstCombineVectorOps.cpp

[InstCombine] merge shuffled vector negate and multiply

2022-03-24 10:25:16 -04:00

InstructionCombining.cpp

[InstCombine] reduce code for freeze of undef

2022-04-18 15:14:02 -04:00