c12c7a84b0
This patch encapsulates decision logic about when and how to generate PAC/BTI related code. It's a part shared by PAC-RET, BTI placement, build attribute emission, etc, so it make sense committing it separately in order to unblock the aforementioned parts, which can proceed concurrently. This patch adds a few member functions to `ARMFunctionInfo`, which are currently unused, therefore there is no testing for them at the moment. This code is tested in follow-up PAC/BTI code gen patches. This patch is part of a series that adds support for the PACBTI-M extension of the Armv8.1-M architecture, as detailed here: https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension The PACBTI-M specification can be found in the Armv8-M Architecture Reference Manual: https://developer.arm.com/documentation/ddi0553/latest The following people contributed to this patch: - Momchil Velikov - Ties Stuij Reviewed By: danielkiss Differential Revision: https://reviews.llvm.org/D112423
76 lines
2.7 KiB
C++
76 lines
2.7 KiB
C++
//===-- ARMMachineFunctionInfo.cpp - ARM machine function info ------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "ARMMachineFunctionInfo.h"
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#include "ARMSubtarget.h"
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using namespace llvm;
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void ARMFunctionInfo::anchor() {}
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static bool GetBranchTargetEnforcement(MachineFunction &MF) {
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const auto &Subtarget = MF.getSubtarget<ARMSubtarget>();
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if (!Subtarget.isMClass() || !Subtarget.hasV7Ops())
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return false;
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const Function &F = MF.getFunction();
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if (!F.hasFnAttribute("branch-target-enforcement")) {
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if (const auto *BTE = mdconst::extract_or_null<ConstantInt>(
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F.getParent()->getModuleFlag("branch-target-enforcement")))
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return BTE->getZExtValue();
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return false;
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}
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const StringRef BTIEnable =
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F.getFnAttribute("branch-target-enforcement").getValueAsString();
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assert(BTIEnable.equals_insensitive("true") ||
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BTIEnable.equals_insensitive("false"));
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return BTIEnable.equals_insensitive("true");
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}
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// The pair returns values for the ARMFunctionInfo members
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// SignReturnAddress and SignReturnAddressAll respectively.
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static std::pair<bool, bool> GetSignReturnAddress(const Function &F) {
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if (!F.hasFnAttribute("sign-return-address")) {
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const Module &M = *F.getParent();
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if (const auto *Sign = mdconst::extract_or_null<ConstantInt>(
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M.getModuleFlag("sign-return-address"))) {
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if (Sign->getZExtValue()) {
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if (const auto *All = mdconst::extract_or_null<ConstantInt>(
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M.getModuleFlag("sign-return-address-all")))
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return {true, All->getZExtValue()};
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return {true, false};
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}
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}
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return {false, false};
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}
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StringRef Scope = F.getFnAttribute("sign-return-address").getValueAsString();
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if (Scope.equals("none"))
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return {false, false};
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if (Scope.equals("all"))
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return {true, true};
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assert(Scope.equals("non-leaf"));
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return {true, false};
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}
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ARMFunctionInfo::ARMFunctionInfo(MachineFunction &MF)
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: isThumb(MF.getSubtarget<ARMSubtarget>().isThumb()),
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hasThumb2(MF.getSubtarget<ARMSubtarget>().hasThumb2()),
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IsCmseNSEntry(MF.getFunction().hasFnAttribute("cmse_nonsecure_entry")),
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IsCmseNSCall(MF.getFunction().hasFnAttribute("cmse_nonsecure_call")),
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BranchTargetEnforcement(GetBranchTargetEnforcement(MF)) {
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const auto &Subtarget = MF.getSubtarget<ARMSubtarget>();
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if (Subtarget.isMClass() && Subtarget.hasV7Ops())
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std::tie(SignReturnAddress, SignReturnAddressAll) =
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GetSignReturnAddress(MF.getFunction());
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}
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