Amara Emerson f7b36b35b6 [AArch64][GlobalISel] Manually select G_DUP with s8/s16 gpr scalar operands. ...

These don't get selected by the imported patterns, and avoiding generating them
is a whole load of not-worth-it-hassle (until we have fp types in GlobalISel).

2020-09-25 01:59:16 -07:00

..

AArch64

[AArch64][GlobalISel] Manually select G_DUP with s8/s16 gpr scalar operands.

2020-09-25 01:59:16 -07:00

AMDGPU

[AMDGPU] Fixes typo in the test. NFC.

2020-09-24 16:07:15 -07:00

ARC

[ARC] Update brcc test.

2020-08-28 17:07:25 -07:00

ARM

[SelectionDAG][GISel] Make LegalizeDAG lower FNEG using integer ops.

2020-09-23 14:10:33 -07:00

AVR

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BPF

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Generic

[Intrinsics] define semantics for experimental fmax/fmin vector reductions

2020-09-12 09:10:28 -04:00

Hexagon

[Hexagon] Avoid crash on CONCAT_VECTORS with illegal element types

2020-09-24 20:05:23 -05:00

Inputs

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Lanai

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Mips

Revert "Reapply Revert "RegAllocFast: Rewrite and improve""

2020-09-22 14:40:06 +05:00

MIR

[MIRVRegNamer] Experimental MachineInstr stable hashing (Fowler-Noll-Vo)

2020-09-03 16:13:09 -04:00

MSP430

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NVPTX

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PowerPC

[PowerPC] Implement the 128-bit vec_[all|any]_[eq | ne | lt | gt | le | ge] builtins in Clang/LLVM

2020-09-23 16:49:40 -04:00

RISCV

[RISCV] Support Shadow Call Stack

2020-09-17 16:02:35 -07:00

SPARC

Revert "Reapply Revert "RegAllocFast: Rewrite and improve""

2020-09-22 14:40:06 +05:00

SystemZ

Revert "Reapply Revert "RegAllocFast: Rewrite and improve""

2020-09-22 14:40:06 +05:00

Thumb

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Thumb2

[ARM] Find VPT implicitly predicated by VCTP

2020-09-25 08:50:53 +01:00

VE

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WebAssembly

[WebAssembly] Make SjLj lowering globals thread-local

2020-09-24 14:56:19 -07:00

WinCFGuard

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WinEH

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X86

[llvm] Add -bbsections-cold-text-prefix to emit cold clusters to a different section.

2020-09-24 15:26:15 -07:00

XCore

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