Vincent Lejeune f940fd05bd R600: Do not fold single instruction with more that 3 kcache read ...

It fixes around 100 tfb piglit tests and 16 glean tests.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175183

2013-02-14 16:57:19 +00:00

..

AArch64

Implement external weak (ELF) symbols on AArch64

2013-02-06 16:43:33 +00:00

ARM

Make ARMAsmParser accept the correct alignment specifier syntax in instructions.

2013-02-14 14:46:12 +00:00

CPP

test commit

2012-07-18 17:53:05 +00:00

Generic

For inline asm:

2013-01-11 18:12:39 +00:00

Hexagon

Hexagon: add support for predicate-GPR copies.

2013-02-13 22:56:34 +00:00

MBlaze

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Mips

For Mips 16, add the optimization where the 16 bit form of addiu sp can be used

2013-02-13 20:28:27 +00:00

MSP430

Add support for varargs functions for msp430.

2012-11-21 17:28:27 +00:00

NVPTX

[NVPTX] Disable vector registers

2013-02-12 14:18:49 +00:00

PowerPC

DAGCombiner: Constant folding around pre-increment loads/stores

2013-02-08 21:35:47 +00:00

R600

R600: Do not fold single instruction with more that 3 kcache read

2013-02-14 16:57:19 +00:00

SI

Add R600 backend

2012-12-11 21:25:42 +00:00

SPARC

Use TargetTransformInfo to control switch-to-lookup table transformation

2012-10-30 11:23:25 +00:00

Thumb

Use the 'count' attribute to calculate the upper bound of an array.

2012-12-04 21:34:03 +00:00

Thumb2

FileCheck-ify some grep tests

2013-01-25 22:11:46 +00:00

X86

Fixed a bug in X86TargetLowering::LowerVectorIntExtend() (assertion failure).

2013-02-14 08:20:26 +00:00

XCore

Fix handling of aliases to functions.

2012-11-16 21:12:38 +00:00