66 lines
2.7 KiB
LLVM
66 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GCN,FAKE16 %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GCN,REAL16 %s
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define float @test_canonicalize_amdgcn_tanh_f32(float %a) {
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; GCN-LABEL: test_canonicalize_amdgcn_tanh_f32:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_wait_loadcnt_dscnt 0x0
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; GCN-NEXT: s_wait_kmcnt 0x0
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; GCN-NEXT: v_tanh_f32_e32 v0, v0
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; GCN-NEXT: s_set_pc_i64 s[30:31]
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%tanh = call float @llvm.amdgcn.tanh.f32(float %a)
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%canonicalized = call float @llvm.canonicalize.f32(float %tanh)
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ret float %canonicalized
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}
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define bfloat @test_canonicalize_amdgcn_tanh_bf16(bfloat %a) {
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; FAKE16-LABEL: test_canonicalize_amdgcn_tanh_bf16:
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; FAKE16: ; %bb.0:
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; FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
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; FAKE16-NEXT: s_wait_kmcnt 0x0
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; FAKE16-NEXT: v_tanh_bf16_e32 v0, v0
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; FAKE16-NEXT: v_nop
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; FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
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; FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
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; FAKE16-NEXT: v_max_num_f32_e32 v0, v0, v0
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; FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; FAKE16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
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; FAKE16-NEXT: s_set_pc_i64 s[30:31]
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;
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; REAL16-LABEL: test_canonicalize_amdgcn_tanh_bf16:
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; REAL16: ; %bb.0:
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; REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
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; REAL16-NEXT: s_wait_kmcnt 0x0
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; REAL16-NEXT: v_tanh_bf16_e32 v0.h, v0.l
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; REAL16-NEXT: v_nop
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; REAL16-NEXT: v_mov_b16_e32 v0.l, 0
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; REAL16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instid1(VALU_DEP_1)
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; REAL16-NEXT: v_max_num_f32_e32 v0, v0, v0
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; REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
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; REAL16-NEXT: s_set_pc_i64 s[30:31]
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%tanh = call bfloat @llvm.amdgcn.tanh.bf16(bfloat %a)
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%canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat %tanh)
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ret bfloat %canonicalized
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}
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define half @test_canonicalize_amdgcn_tanh_f16(half %a) {
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; FAKE16-LABEL: test_canonicalize_amdgcn_tanh_f16:
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; FAKE16: ; %bb.0:
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; FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
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; FAKE16-NEXT: s_wait_kmcnt 0x0
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; FAKE16-NEXT: v_tanh_f16_e32 v0, v0
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; FAKE16-NEXT: s_set_pc_i64 s[30:31]
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;
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; REAL16-LABEL: test_canonicalize_amdgcn_tanh_f16:
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; REAL16: ; %bb.0:
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; REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
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; REAL16-NEXT: s_wait_kmcnt 0x0
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; REAL16-NEXT: v_tanh_f16_e32 v0.l, v0.l
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; REAL16-NEXT: s_set_pc_i64 s[30:31]
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%tanh = call half @llvm.amdgcn.tanh.f16(half %a)
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%canonicalized = call half @llvm.canonicalize.f16(half %tanh)
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ret half %canonicalized
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}
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