32161e9de3
Do not fold an immediate into an instruction that already has a frame index operand. A frame index could possibly turn out to be another immediate. Fixes: SWDEV-536263 --------- Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
287 lines
7.2 KiB
YAML
287 lines
7.2 KiB
YAML
# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass si-fold-operands %s -o - | FileCheck -check-prefix=GCN %s
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# GCN-LABEL: name: test_part_fold{{$}}
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# GCN: %2:sreg_32 = S_ADD_I32 70, %1
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---
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name: test_part_fold
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_MOV_B32 80
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%2:sreg_32 = S_ADD_I32 %0, %1, implicit-def $scc
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...
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# GCN-LABEL: name: test_inline_const{{$}}
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# GCN: %2:sreg_32 = S_ADD_I32 70, 63
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---
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name: test_inline_const
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_MOV_B32 63
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%2:sreg_32 = S_ADD_I32 %0, %1, implicit-def $scc
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...
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# GCN-LABEL: name: test_obscure{{$}}
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# GCN: %2:sreg_32 = S_LSHL2_ADD_U32 70, %1
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---
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name: test_obscure
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_MOV_B32 80
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%2:sreg_32 = S_LSHL2_ADD_U32 %0, %1, implicit-def $scc
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...
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# GCN-LABEL: name: test_obscure_inline{{$}}
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# GCN: %2:sreg_32 = S_LSHL2_ADD_U32 70, 63
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---
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name: test_obscure_inline
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_MOV_B32 63
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%2:sreg_32 = S_LSHL2_ADD_U32 %0, %1, implicit-def $scc
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...
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# GCN-LABEL: name: test_frameindex{{$}}
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# GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 70
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# GCN-NEXT: %1:sreg_32 = S_ADD_I32 %stack.0, [[S_MOV_B32_]]
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---
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name: test_frameindex
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16}
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_ADD_I32 %stack.0, %0, implicit-def $scc
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...
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# GCN-LABEL: name: test_frameindex_inline{{$}}
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# GCN: %1:sreg_32 = S_ADD_I32 %stack.0, 63
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---
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name: test_frameindex_inline
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16}
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 63
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%1:sreg_32 = S_ADD_I32 %stack.0, %0, implicit-def $scc
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...
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# GCN-LABEL: name: test_no_fold_literal_already_inline_lhs{{$}}
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# GCN: %0:sreg_32 = S_MOV_B32 80
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# GCN-NEXT: %1:sreg_32 = S_ADD_I32 70, %0
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---
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name: test_no_fold_literal_already_inline_lhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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%1:sreg_32 = S_ADD_I32 70, %0, implicit-def $scc
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...
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# GCN-LABEL: name: test_no_fold_literal_already_inline_rhs{{$}}
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# GCN: %0:sreg_32 = S_MOV_B32 80
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# GCN-NEXT: %1:sreg_32 = S_ADD_I32 %0, 70
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---
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name: test_no_fold_literal_already_inline_rhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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%1:sreg_32 = S_ADD_I32 %0, 70, implicit-def $scc
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...
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# GCN-LABEL: name: test_fold_literal_inlineimm_lhs{{$}}
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# GCN: %1:sreg_32 = S_ADD_I32 64, 80
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---
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name: test_fold_literal_inlineimm_lhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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%1:sreg_32 = S_ADD_I32 64, %0, implicit-def $scc
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...
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# GCN-LABEL: name: test_fold_literal_inlineimm_rhs{{$}}
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# GCN: %1:sreg_32 = S_ADD_I32 80, 64
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---
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name: test_fold_literal_inlineimm_rhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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%1:sreg_32 = S_ADD_I32 %0, 64, implicit-def $scc
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...
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# GCN-LABEL: name: test_fold_same_literal_2x{{$}}
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# GCN: %2:sreg_32 = S_ADD_I32 70, 70
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---
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name: test_fold_same_literal_2x
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_MOV_B32 70
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%2:sreg_32 = S_ADD_I32 %0, %1, implicit-def $scc
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...
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# GCN-LABEL: name: test_fold_same_literal_lhs{{$}}
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# GCN: %1:sreg_32 = S_ADD_I32 70, 70
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---
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name: test_fold_same_literal_lhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_ADD_I32 70, %0, implicit-def $scc
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...
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# GCN-LABEL: name: test_fold_same_literal_rhs{{$}}
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# GCN: %1:sreg_32 = S_ADD_I32 70, 70
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---
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name: test_fold_same_literal_rhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_ADD_I32 %0, 70, implicit-def $scc
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...
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# GCN-LABEL: name: test_s_cselect_b32_2x_literal_fold{{$}}
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# GCN: %2:sreg_32 = S_CSELECT_B32 70, %1, implicit $scc
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---
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name: test_s_cselect_b32_2x_literal_fold
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_MOV_B32 80
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$scc = IMPLICIT_DEF
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%2:sreg_32 = S_CSELECT_B32 %0, %1, implicit $scc
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...
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# GCN-LABEL: name: test_s_cselect_b32_fold_literal_literal_lhs{{$}}
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# GCN: %1:sreg_32 = S_CSELECT_B32 70, %0, implicit $scc
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---
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name: test_s_cselect_b32_fold_literal_literal_lhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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$scc = IMPLICIT_DEF
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%1:sreg_32 = S_CSELECT_B32 70, %0, implicit $scc
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...
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# GCN-LABEL: name: test_s_cselect_b32_fold_literal_literal_rhs{{$}}
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# GCN: %1:sreg_32 = S_CSELECT_B32 %0, 70, implicit $scc
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---
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name: test_s_cselect_b32_fold_literal_literal_rhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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$scc = IMPLICIT_DEF
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%1:sreg_32 = S_CSELECT_B32 %0, 70, implicit $scc
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...
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# GCN-LABEL: name: test_s_cselect_b32_fold_literal_inlineimm_lhs{{$}}
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# GCN: %1:sreg_32 = S_CSELECT_B32 64, 80, implicit $scc
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---
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name: test_s_cselect_b32_fold_literal_inlineimm_lhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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$scc = IMPLICIT_DEF
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%1:sreg_32 = S_CSELECT_B32 64, %0, implicit $scc
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...
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# GCN-LABEL: name: test_s_cselect_b32_fold_literal_inlineimm_rhs{{$}}
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# GCN: %1:sreg_32 = S_CSELECT_B32 80, 64, implicit $scc
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---
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name: test_s_cselect_b32_fold_literal_inlineimm_rhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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$scc = IMPLICIT_DEF
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%1:sreg_32 = S_CSELECT_B32 %0, 64, implicit $scc
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...
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# GCN-LABEL: name: test_s_cmp_b32_2x_literal_fold{{$}}
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# GCN: S_CMP_EQ_U32 70, %1, implicit-def $scc
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---
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name: test_s_cmp_b32_2x_literal_fold
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_MOV_B32 80
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$scc = IMPLICIT_DEF
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S_CMP_EQ_U32 %0, %1, implicit-def $scc
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...
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# GCN-LABEL: name: test_s_cmp_b32_literal_literal_lhs{{$}}
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# GCN: S_CMP_EQ_U32 70, %0, implicit-def $scc
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---
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name: test_s_cmp_b32_literal_literal_lhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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S_CMP_EQ_U32 70, %0, implicit-def $scc
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...
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# GCN-LABEL: name: test_s_cmp_b32_literal_literal_rhs{{$}}
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# GCN: S_CMP_EQ_U32 %0, 70, implicit-def $scc
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---
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name: test_s_cmp_b32_literal_literal_rhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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S_CMP_EQ_U32 %0, 70, implicit-def $scc
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...
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# GCN-LABEL: name: test_s_cmp_b32_literal_inlineimm_lhs{{$}}
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# GCN: S_CMP_EQ_U32 64, 80, implicit-def $scc
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---
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name: test_s_cmp_b32_literal_inlineimm_lhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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S_CMP_EQ_U32 64, %0, implicit-def $scc
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...
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# GCN-LABEL: name: test_s_cmp_b32_literal_inlineimm_rhs{{$}}
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# GCN: S_CMP_EQ_U32 80, 64, implicit-def $scc
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---
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name: test_s_cmp_b32_literal_inlineimm_rhs
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 80
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S_CMP_EQ_U32 %0, 64, implicit-def $scc
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...
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# Ignore regmask operands
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# GCN-LABEL: name: test_si_cs_chain_fold_with_regmask{{$}}
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# GCN: SI_CS_CHAIN_TC_W32 %0, 0, 0, 1234, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8
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---
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name: test_si_cs_chain_fold_with_regmask
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr2_sgpr3, $vgpr8
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%1:ccr_sgpr_64 = COPY $sgpr2_sgpr3
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%2:sreg_32 = S_MOV_B32 1234
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SI_CS_CHAIN_TC_W32 %1:ccr_sgpr_64, 0, 0, %2:sreg_32, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8
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...
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