af95b0a615
The mov64 pseudo is split into two 32 bit movs, but those 32 bit movs had the full 64-bit register still implicitly defined. VOPD formation is affected, so we can emit more of them.
1056 lines
46 KiB
LLVM
1056 lines
46 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,SDAG %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GISEL %s
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define i128 @fptosi_f64_to_i128(double %x) {
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; SDAG-LABEL: fptosi_f64_to_i128:
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; SDAG: ; %bb.0: ; %fp-to-i-entry
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; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; SDAG-NEXT: v_mov_b32_e32 v5, v1
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; SDAG-NEXT: v_bfe_u32 v6, v5, 20, 11
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; SDAG-NEXT: v_mov_b32_e32 v7, 0
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; SDAG-NEXT: s_mov_b64 s[4:5], 0x3fe
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; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[6:7]
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; SDAG-NEXT: v_mov_b32_e32 v4, v0
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; SDAG-NEXT: v_mov_b32_e32 v0, 0
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; SDAG-NEXT: v_mov_b32_e32 v1, 0
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; SDAG-NEXT: v_mov_b32_e32 v2, 0
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; SDAG-NEXT: v_mov_b32_e32 v3, 0
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; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc
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; SDAG-NEXT: s_cbranch_execz .LBB0_6
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; SDAG-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
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; SDAG-NEXT: s_mov_b64 s[4:5], 0x432
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; SDAG-NEXT: v_ashrrev_i32_e32 v8, 31, v5
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; SDAG-NEXT: v_and_b32_e32 v0, 0xfffff, v5
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; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[6:7]
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; SDAG-NEXT: v_or_b32_e32 v9, 1, v8
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; SDAG-NEXT: v_or_b32_e32 v5, 0x100000, v0
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; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1
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; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3
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; SDAG-NEXT: s_and_saveexec_b64 s[4:5], vcc
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; SDAG-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
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; SDAG-NEXT: s_cbranch_execz .LBB0_3
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; SDAG-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
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; SDAG-NEXT: v_sub_u32_e32 v0, 0x473, v6
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; SDAG-NEXT: v_add_u32_e32 v2, 0xfffffb8d, v6
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; SDAG-NEXT: v_add_u32_e32 v3, 0xfffffbcd, v6
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; SDAG-NEXT: v_lshrrev_b64 v[0:1], v0, v[4:5]
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; SDAG-NEXT: v_lshlrev_b64 v[6:7], v2, v[4:5]
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; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v3
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; SDAG-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v3
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; SDAG-NEXT: v_lshlrev_b64 v[3:4], v3, v[4:5]
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; SDAG-NEXT: v_cndmask_b32_e32 v1, v7, v1, vcc
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; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v1, s[4:5]
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; SDAG-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc
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; SDAG-NEXT: v_cndmask_b32_e32 v7, 0, v3, vcc
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; SDAG-NEXT: v_cndmask_b32_e64 v5, 0, v0, s[4:5]
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; SDAG-NEXT: v_mul_lo_u32 v11, v9, v1
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; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v7, v9, 0
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; SDAG-NEXT: v_mov_b32_e32 v2, 0
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; SDAG-NEXT: v_cndmask_b32_e32 v12, 0, v4, vcc
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; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v12, v9, v[1:2]
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; SDAG-NEXT: v_mul_lo_u32 v10, v8, v5
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; SDAG-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v9, v5, 0
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; SDAG-NEXT: v_mov_b32_e32 v1, v3
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; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v7, v8, v[1:2]
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; SDAG-NEXT: v_add3_u32 v6, v6, v11, v10
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; SDAG-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v8, v7, v[5:6]
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; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v4, v2
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; SDAG-NEXT: v_addc_co_u32_e64 v3, s[4:5], 0, 0, vcc
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; SDAG-NEXT: v_mul_lo_u32 v9, v8, v12
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; SDAG-NEXT: v_mul_lo_u32 v7, v8, v7
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; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v12, v8, v[2:3]
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; SDAG-NEXT: ; implicit-def: $vgpr8
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; SDAG-NEXT: v_add3_u32 v4, v7, v6, v9
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; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v2, v5
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; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, v3, v4, vcc
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; SDAG-NEXT: ; implicit-def: $vgpr6_vgpr7
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; SDAG-NEXT: ; implicit-def: $vgpr4_vgpr5
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; SDAG-NEXT: ; implicit-def: $vgpr9
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; SDAG-NEXT: .LBB0_3: ; %Flow
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; SDAG-NEXT: s_andn2_saveexec_b64 s[4:5], s[8:9]
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; SDAG-NEXT: s_cbranch_execz .LBB0_5
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; SDAG-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
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; SDAG-NEXT: v_sub_u32_e32 v0, 0x433, v6
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; SDAG-NEXT: v_lshrrev_b64 v[4:5], v0, v[4:5]
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; SDAG-NEXT: v_mov_b32_e32 v2, 0
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; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[8:9], v4, v9, 0
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; SDAG-NEXT: v_mad_u64_u32 v[6:7], s[8:9], v5, v9, v[1:2]
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; SDAG-NEXT: v_mov_b32_e32 v1, v6
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; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[8:9], v4, v8, v[1:2]
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; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v7, v2
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; SDAG-NEXT: v_addc_co_u32_e64 v3, s[8:9], 0, 0, vcc
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; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[8:9], v5, v8, v[2:3]
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; SDAG-NEXT: v_mul_lo_u32 v5, v8, v5
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; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[8:9], v8, v4, v[2:3]
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; SDAG-NEXT: v_mul_lo_u32 v4, v8, v4
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; SDAG-NEXT: v_add3_u32 v3, v4, v3, v5
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; SDAG-NEXT: .LBB0_5: ; %Flow1
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; SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
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; SDAG-NEXT: .LBB0_6: ; %fp-to-i-cleanup
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; SDAG-NEXT: s_or_b64 exec, exec, s[6:7]
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; SDAG-NEXT: s_setpc_b64 s[30:31]
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;
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; GISEL-LABEL: fptosi_f64_to_i128:
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; GISEL: ; %bb.0: ; %fp-to-i-entry
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; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GISEL-NEXT: v_mov_b32_e32 v4, v0
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; GISEL-NEXT: v_mov_b32_e32 v5, v1
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; GISEL-NEXT: v_lshrrev_b64 v[0:1], 52, v[4:5]
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; GISEL-NEXT: v_mov_b32_e32 v7, 0
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; GISEL-NEXT: v_mov_b32_e32 v1, 0x3ff
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; GISEL-NEXT: v_mov_b32_e32 v2, 0
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; GISEL-NEXT: v_bfe_u32 v6, v0, 0, 11
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; GISEL-NEXT: s_mov_b64 s[4:5], 0
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; GISEL-NEXT: v_cmp_ge_u64_e32 vcc, v[6:7], v[1:2]
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; GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
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; GISEL-NEXT: v_mov_b32_e32 v0, s4
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; GISEL-NEXT: v_mov_b32_e32 v1, s5
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; GISEL-NEXT: v_mov_b32_e32 v2, s6
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; GISEL-NEXT: v_mov_b32_e32 v3, s7
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; GISEL-NEXT: s_and_saveexec_b64 s[10:11], vcc
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; GISEL-NEXT: s_cbranch_execz .LBB0_6
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; GISEL-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
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; GISEL-NEXT: v_cmp_ge_i64_e32 vcc, -1, v[4:5]
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; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
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; GISEL-NEXT: v_and_b32_e32 v0, 1, v0
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; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc
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; GISEL-NEXT: v_lshlrev_b16_e32 v2, 1, v0
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v2
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; GISEL-NEXT: v_lshlrev_b16_e32 v3, 2, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v0, v2
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v3
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; GISEL-NEXT: v_lshlrev_b16_e32 v8, 3, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v3
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v8
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; GISEL-NEXT: v_lshlrev_b16_e32 v9, 4, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v8
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v9
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; GISEL-NEXT: v_lshlrev_b16_e32 v10, 5, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v9
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v10
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; GISEL-NEXT: v_lshlrev_b16_e32 v11, 6, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v10
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v11
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; GISEL-NEXT: v_lshlrev_b16_e32 v12, 7, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v11
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v12
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; GISEL-NEXT: v_lshlrev_b16_e32 v13, 8, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v12
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v13
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; GISEL-NEXT: v_lshlrev_b16_e32 v14, 9, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v13
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v14
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; GISEL-NEXT: v_lshlrev_b16_e32 v15, 10, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v14
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v15
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; GISEL-NEXT: v_lshlrev_b16_e32 v16, 11, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v15
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v16
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; GISEL-NEXT: v_lshlrev_b16_e32 v17, 12, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v16
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v17
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; GISEL-NEXT: v_lshlrev_b16_e32 v18, 13, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v17
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v18
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; GISEL-NEXT: v_lshlrev_b16_e32 v19, 14, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v18
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v19
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; GISEL-NEXT: v_lshlrev_b16_e32 v0, 15, v0
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; GISEL-NEXT: v_or_b32_e32 v2, v2, v19
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; GISEL-NEXT: v_or_b32_e32 v1, v1, v0
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; GISEL-NEXT: v_or_b32_e32 v0, v2, v0
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; GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v1
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; GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v0
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; GISEL-NEXT: v_lshl_or_b32 v10, v0, 16, v0
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; GISEL-NEXT: v_or3_b32 v8, v1, v2, 1
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; GISEL-NEXT: v_or3_b32 v9, v0, v2, 0
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; GISEL-NEXT: v_mov_b32_e32 v0, 0x433
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; GISEL-NEXT: v_mov_b32_e32 v1, 0
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; GISEL-NEXT: v_mov_b32_e32 v2, 0xfffff
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; GISEL-NEXT: v_mov_b32_e32 v3, 0x100000
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; GISEL-NEXT: v_cmp_ge_u64_e32 vcc, v[6:7], v[0:1]
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; GISEL-NEXT: v_and_or_b32 v5, v5, v2, v3
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; GISEL-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
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; GISEL-NEXT: s_and_saveexec_b64 s[4:5], vcc
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; GISEL-NEXT: s_xor_b64 s[12:13], exec, s[4:5]
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; GISEL-NEXT: s_cbranch_execz .LBB0_3
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; GISEL-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
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; GISEL-NEXT: v_add_u32_e32 v2, 0xfffffbcd, v6
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; GISEL-NEXT: v_lshlrev_b64 v[0:1], v2, v[4:5]
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; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v2
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; GISEL-NEXT: v_cndmask_b32_e32 v11, 0, v0, vcc
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; GISEL-NEXT: v_cndmask_b32_e32 v12, 0, v1, vcc
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; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v11, v10, 0
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; GISEL-NEXT: v_add_u32_e32 v3, 0xfffffb8d, v6
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; GISEL-NEXT: v_sub_u32_e32 v6, 64, v2
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; GISEL-NEXT: v_lshrrev_b64 v[6:7], v6, v[4:5]
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; GISEL-NEXT: v_lshlrev_b64 v[3:4], v3, v[4:5]
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; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v2
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; GISEL-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc
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; GISEL-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v12, v9, v[0:1]
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; GISEL-NEXT: v_cndmask_b32_e64 v13, v3, 0, s[4:5]
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; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v11, v8, 0
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; GISEL-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v13, v8, v[5:6]
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; GISEL-NEXT: v_mul_lo_u32 v14, v12, v10
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; GISEL-NEXT: v_mul_lo_u32 v10, v11, v10
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; GISEL-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v11, v9, v[1:2]
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; GISEL-NEXT: v_mad_u64_u32 v[1:2], s[8:9], v12, v8, v[5:6]
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; GISEL-NEXT: v_addc_co_u32_e64 v3, s[8:9], v3, v10, s[8:9]
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; GISEL-NEXT: v_addc_co_u32_e64 v3, s[6:7], v3, v14, s[6:7]
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; GISEL-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v13, v9, v[3:4]
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; GISEL-NEXT: v_cndmask_b32_e32 v3, v4, v7, vcc
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; GISEL-NEXT: v_cndmask_b32_e64 v7, v3, 0, s[4:5]
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; GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v7, v8, v[5:6]
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; GISEL-NEXT: ; implicit-def: $vgpr6
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; GISEL-NEXT: ; implicit-def: $vgpr4_vgpr5
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; GISEL-NEXT: ; implicit-def: $vgpr8
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; GISEL-NEXT: ; implicit-def: $vgpr10
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; GISEL-NEXT: ; implicit-def: $vgpr9
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; GISEL-NEXT: .LBB0_3: ; %Flow
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; GISEL-NEXT: s_andn2_saveexec_b64 s[6:7], s[12:13]
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; GISEL-NEXT: s_cbranch_execz .LBB0_5
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; GISEL-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
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; GISEL-NEXT: v_sub_co_u32_e32 v0, vcc, 0x433, v6
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; GISEL-NEXT: v_lshrrev_b64 v[4:5], v0, v[4:5]
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; GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v4, v10, 0
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; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v4, v8, 0
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; GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v5, v9, v[6:7]
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; GISEL-NEXT: v_mul_lo_u32 v11, v5, v10
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; GISEL-NEXT: v_mad_u64_u32 v[6:7], vcc, v4, v9, v[1:2]
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; GISEL-NEXT: v_mul_lo_u32 v4, v4, v10
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; GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v5, v8, v[6:7]
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; GISEL-NEXT: v_addc_co_u32_e64 v3, s[4:5], v3, v4, s[4:5]
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; GISEL-NEXT: v_addc_co_u32_e32 v3, vcc, v3, v11, vcc
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; GISEL-NEXT: .LBB0_5: ; %Flow1
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; GISEL-NEXT: s_or_b64 exec, exec, s[6:7]
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; GISEL-NEXT: .LBB0_6: ; %fp-to-i-cleanup
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; GISEL-NEXT: s_or_b64 exec, exec, s[10:11]
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; GISEL-NEXT: s_setpc_b64 s[30:31]
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%cvt = fptosi double %x to i128
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ret i128 %cvt
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}
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define i128 @fptoui_f64_to_i128(double %x) {
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; SDAG-LABEL: fptoui_f64_to_i128:
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; SDAG: ; %bb.0: ; %fp-to-i-entry
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; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; SDAG-NEXT: v_bfe_u32 v6, v1, 20, 11
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; SDAG-NEXT: v_mov_b32_e32 v7, 0
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; SDAG-NEXT: s_mov_b64 s[4:5], 0x3fe
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; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[6:7]
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; SDAG-NEXT: v_mov_b32_e32 v4, 0
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|
; SDAG-NEXT: v_mov_b32_e32 v5, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v2, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v3, 0
|
|
; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc
|
|
; SDAG-NEXT: s_cbranch_execz .LBB1_6
|
|
; SDAG-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
|
|
; SDAG-NEXT: s_mov_b64 s[4:5], 0x432
|
|
; SDAG-NEXT: v_and_b32_e32 v1, 0xfffff, v1
|
|
; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[6:7]
|
|
; SDAG-NEXT: v_or_b32_e32 v1, 0x100000, v1
|
|
; SDAG-NEXT: ; implicit-def: $vgpr4_vgpr5
|
|
; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3
|
|
; SDAG-NEXT: s_and_saveexec_b64 s[4:5], vcc
|
|
; SDAG-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
|
|
; SDAG-NEXT: s_cbranch_execz .LBB1_3
|
|
; SDAG-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
|
|
; SDAG-NEXT: v_sub_u32_e32 v2, 0x473, v6
|
|
; SDAG-NEXT: v_add_u32_e32 v4, 0xfffffb8d, v6
|
|
; SDAG-NEXT: v_add_u32_e32 v7, 0xfffffbcd, v6
|
|
; SDAG-NEXT: v_lshrrev_b64 v[2:3], v2, v[0:1]
|
|
; SDAG-NEXT: v_lshlrev_b64 v[4:5], v4, v[0:1]
|
|
; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v7
|
|
; SDAG-NEXT: v_lshlrev_b64 v[0:1], v7, v[0:1]
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc
|
|
; SDAG-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v7
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc
|
|
; SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5]
|
|
; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[4:5]
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v1, vcc
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v0, vcc
|
|
; SDAG-NEXT: ; implicit-def: $vgpr6_vgpr7
|
|
; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1
|
|
; SDAG-NEXT: .LBB1_3: ; %Flow
|
|
; SDAG-NEXT: s_andn2_saveexec_b64 s[4:5], s[8:9]
|
|
; SDAG-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
|
|
; SDAG-NEXT: v_sub_u32_e32 v2, 0x433, v6
|
|
; SDAG-NEXT: v_lshrrev_b64 v[4:5], v2, v[0:1]
|
|
; SDAG-NEXT: v_mov_b32_e32 v2, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v3, 0
|
|
; SDAG-NEXT: ; %bb.5: ; %Flow1
|
|
; SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
|
|
; SDAG-NEXT: .LBB1_6: ; %fp-to-i-cleanup
|
|
; SDAG-NEXT: s_or_b64 exec, exec, s[6:7]
|
|
; SDAG-NEXT: v_mov_b32_e32 v0, v4
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, v5
|
|
; SDAG-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GISEL-LABEL: fptoui_f64_to_i128:
|
|
; GISEL: ; %bb.0: ; %fp-to-i-entry
|
|
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GISEL-NEXT: v_mov_b32_e32 v4, v0
|
|
; GISEL-NEXT: v_mov_b32_e32 v5, v1
|
|
; GISEL-NEXT: v_lshrrev_b64 v[0:1], 52, v[4:5]
|
|
; GISEL-NEXT: v_mov_b32_e32 v7, 0
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, 0x3ff
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, 0
|
|
; GISEL-NEXT: v_bfe_u32 v6, v0, 0, 11
|
|
; GISEL-NEXT: s_mov_b64 s[4:5], 0
|
|
; GISEL-NEXT: v_cmp_ge_u64_e32 vcc, v[6:7], v[1:2]
|
|
; GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, s4
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, s5
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, s6
|
|
; GISEL-NEXT: v_mov_b32_e32 v3, s7
|
|
; GISEL-NEXT: s_and_saveexec_b64 s[4:5], vcc
|
|
; GISEL-NEXT: s_cbranch_execz .LBB1_6
|
|
; GISEL-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x433
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, 0
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, 0xfffff
|
|
; GISEL-NEXT: v_mov_b32_e32 v3, 0x100000
|
|
; GISEL-NEXT: v_cmp_ge_u64_e32 vcc, v[6:7], v[0:1]
|
|
; GISEL-NEXT: v_and_or_b32 v5, v5, v2, v3
|
|
; GISEL-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
|
|
; GISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
|
|
; GISEL-NEXT: s_cbranch_execz .LBB1_3
|
|
; GISEL-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
|
|
; GISEL-NEXT: v_add_u32_e32 v7, 0xfffffbcd, v6
|
|
; GISEL-NEXT: v_add_u32_e32 v6, 0xfffffb8d, v6
|
|
; GISEL-NEXT: v_sub_u32_e32 v2, 64, v7
|
|
; GISEL-NEXT: v_lshlrev_b64 v[0:1], v7, v[4:5]
|
|
; GISEL-NEXT: v_lshrrev_b64 v[2:3], v2, v[4:5]
|
|
; GISEL-NEXT: v_lshlrev_b64 v[4:5], v6, v[4:5]
|
|
; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v7
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc
|
|
; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v7
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v2, v2, 0, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v3, v3, 0, vcc
|
|
; GISEL-NEXT: ; implicit-def: $vgpr6
|
|
; GISEL-NEXT: ; implicit-def: $vgpr4_vgpr5
|
|
; GISEL-NEXT: .LBB1_3: ; %Flow
|
|
; GISEL-NEXT: s_andn2_saveexec_b64 s[6:7], s[6:7]
|
|
; GISEL-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
|
|
; GISEL-NEXT: v_sub_co_u32_e32 v0, vcc, 0x433, v6
|
|
; GISEL-NEXT: v_lshrrev_b64 v[0:1], v0, v[4:5]
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, 0
|
|
; GISEL-NEXT: v_mov_b32_e32 v3, 0
|
|
; GISEL-NEXT: ; %bb.5: ; %Flow1
|
|
; GISEL-NEXT: s_or_b64 exec, exec, s[6:7]
|
|
; GISEL-NEXT: .LBB1_6: ; %fp-to-i-cleanup
|
|
; GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
|
|
; GISEL-NEXT: s_setpc_b64 s[30:31]
|
|
%cvt = fptoui double %x to i128
|
|
ret i128 %cvt
|
|
}
|
|
|
|
define i128 @fptosi_f32_to_i128(float %x) {
|
|
; SDAG-LABEL: fptosi_f32_to_i128:
|
|
; SDAG: ; %bb.0: ; %fp-to-i-entry
|
|
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; SDAG-NEXT: v_mov_b32_e32 v4, v0
|
|
; SDAG-NEXT: v_bfe_u32 v9, v4, 23, 8
|
|
; SDAG-NEXT: s_movk_i32 s4, 0x7e
|
|
; SDAG-NEXT: v_mov_b32_e32 v0, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v2, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v3, 0
|
|
; SDAG-NEXT: v_cmp_lt_u32_e32 vcc, s4, v9
|
|
; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc
|
|
; SDAG-NEXT: s_cbranch_execz .LBB2_6
|
|
; SDAG-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
|
|
; SDAG-NEXT: v_ashrrev_i32_e32 v5, 31, v4
|
|
; SDAG-NEXT: v_and_b32_e32 v0, 0x7fffff, v4
|
|
; SDAG-NEXT: s_movk_i32 s4, 0x95
|
|
; SDAG-NEXT: v_ashrrev_i32_e32 v7, 31, v5
|
|
; SDAG-NEXT: v_or_b32_e32 v8, 1, v5
|
|
; SDAG-NEXT: v_or_b32_e32 v1, 0x800000, v0
|
|
; SDAG-NEXT: v_cmp_lt_u32_e32 vcc, s4, v9
|
|
; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3
|
|
; SDAG-NEXT: s_and_saveexec_b64 s[4:5], vcc
|
|
; SDAG-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
|
|
; SDAG-NEXT: s_cbranch_execz .LBB2_3
|
|
; SDAG-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
|
|
; SDAG-NEXT: v_mov_b32_e32 v2, 0
|
|
; SDAG-NEXT: v_sub_u32_e32 v3, 0xd6, v9
|
|
; SDAG-NEXT: v_add_u32_e32 v6, 0xffffff2a, v9
|
|
; SDAG-NEXT: v_add_u32_e32 v0, 0xffffff6a, v9
|
|
; SDAG-NEXT: v_lshrrev_b64 v[3:4], v3, v[1:2]
|
|
; SDAG-NEXT: v_lshlrev_b64 v[9:10], v6, v[1:2]
|
|
; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v0
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v4, v10, v4, vcc
|
|
; SDAG-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v0
|
|
; SDAG-NEXT: v_cndmask_b32_e64 v6, 0, v4, s[4:5]
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v9, v9, v3, vcc
|
|
; SDAG-NEXT: v_lshlrev_b64 v[3:4], v0, v[1:2]
|
|
; SDAG-NEXT: v_cndmask_b32_e64 v9, 0, v9, s[4:5]
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v11, 0, v3, vcc
|
|
; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v11, v8, 0
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v13, 0, v4, vcc
|
|
; SDAG-NEXT: v_mul_lo_u32 v12, v7, v9
|
|
; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v13, v8, v[1:2]
|
|
; SDAG-NEXT: v_mul_lo_u32 v6, v8, v6
|
|
; SDAG-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v8, v9, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, v3
|
|
; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v11, v7, v[1:2]
|
|
; SDAG-NEXT: v_add3_u32 v10, v10, v6, v12
|
|
; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v5, v11, v[9:10]
|
|
; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v4, v2
|
|
; SDAG-NEXT: v_addc_co_u32_e64 v3, s[4:5], 0, 0, vcc
|
|
; SDAG-NEXT: v_mul_lo_u32 v6, v5, v13
|
|
; SDAG-NEXT: v_mul_lo_u32 v5, v5, v11
|
|
; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v13, v7, v[2:3]
|
|
; SDAG-NEXT: ; implicit-def: $vgpr7
|
|
; SDAG-NEXT: v_add3_u32 v4, v5, v9, v6
|
|
; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v2, v8
|
|
; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, v3, v4, vcc
|
|
; SDAG-NEXT: ; implicit-def: $vgpr9
|
|
; SDAG-NEXT: ; implicit-def: $vgpr8
|
|
; SDAG-NEXT: ; implicit-def: $vgpr5_vgpr6
|
|
; SDAG-NEXT: .LBB2_3: ; %Flow
|
|
; SDAG-NEXT: s_andn2_saveexec_b64 s[4:5], s[8:9]
|
|
; SDAG-NEXT: s_cbranch_execz .LBB2_5
|
|
; SDAG-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
|
|
; SDAG-NEXT: v_sub_u32_e32 v0, 0x96, v9
|
|
; SDAG-NEXT: v_lshrrev_b32_e32 v3, v0, v1
|
|
; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[8:9], v3, v8, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v2, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v8, v2
|
|
; SDAG-NEXT: v_mad_u64_u32 v[6:7], s[8:9], v3, v7, v[1:2]
|
|
; SDAG-NEXT: v_mad_i64_i32 v[2:3], s[8:9], v5, v3, v[7:8]
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, v6
|
|
; SDAG-NEXT: .LBB2_5: ; %Flow1
|
|
; SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
|
|
; SDAG-NEXT: .LBB2_6: ; %fp-to-i-cleanup
|
|
; SDAG-NEXT: s_or_b64 exec, exec, s[6:7]
|
|
; SDAG-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GISEL-LABEL: fptosi_f32_to_i128:
|
|
; GISEL: ; %bb.0: ; %fp-to-i-entry
|
|
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GISEL-NEXT: v_mov_b32_e32 v4, v0
|
|
; GISEL-NEXT: v_bfe_u32 v6, v4, 23, 8
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x7f
|
|
; GISEL-NEXT: s_mov_b64 s[4:5], 0
|
|
; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v6, v0
|
|
; GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, s4
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, s5
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, s6
|
|
; GISEL-NEXT: v_mov_b32_e32 v3, s7
|
|
; GISEL-NEXT: s_and_saveexec_b64 s[10:11], vcc
|
|
; GISEL-NEXT: s_cbranch_execz .LBB2_6
|
|
; GISEL-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
|
|
; GISEL-NEXT: v_cmp_ge_i32_e32 vcc, -1, v4
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
|
|
; GISEL-NEXT: v_and_b32_e32 v0, 1, v0
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v2, 1, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v2
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v3, 2, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v0, v2
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v3
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v7, 3, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v3
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v7
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v8, 4, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v7
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v8
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v9, 5, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v8
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v9
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v10, 6, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v9
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v10
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v11, 7, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v10
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v11
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v12, 8, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v11
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v12
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v13, 9, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v12
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v13
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v14, 10, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v13
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v14
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v15, 11, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v14
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v15
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v16, 12, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v15
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v16
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v17, 13, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v16
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v17
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v18, 14, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v17
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v18
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v0, 15, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v18
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v0, v2, v0
|
|
; GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v0
|
|
; GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v1
|
|
; GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v0
|
|
; GISEL-NEXT: v_lshl_or_b32 v9, v0, 16, v0
|
|
; GISEL-NEXT: v_or3_b32 v7, v1, v2, 1
|
|
; GISEL-NEXT: v_or3_b32 v8, v0, v2, 0
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x7fffff
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, 0x800000
|
|
; GISEL-NEXT: v_and_or_b32 v4, v4, v0, v1
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x96
|
|
; GISEL-NEXT: v_mov_b32_e32 v5, 0
|
|
; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v6, v0
|
|
; GISEL-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GISEL-NEXT: s_and_saveexec_b64 s[4:5], vcc
|
|
; GISEL-NEXT: s_xor_b64 s[12:13], exec, s[4:5]
|
|
; GISEL-NEXT: s_cbranch_execz .LBB2_3
|
|
; GISEL-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
|
|
; GISEL-NEXT: v_add_u32_e32 v2, 0xffffff6a, v6
|
|
; GISEL-NEXT: v_lshlrev_b64 v[0:1], v2, v[4:5]
|
|
; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v2
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v12, 0, v0, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v13, 0, v1, vcc
|
|
; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v12, v9, 0
|
|
; GISEL-NEXT: v_add_u32_e32 v3, 0xffffff2a, v6
|
|
; GISEL-NEXT: v_sub_u32_e32 v6, 64, v2
|
|
; GISEL-NEXT: v_lshrrev_b64 v[10:11], v6, v[4:5]
|
|
; GISEL-NEXT: v_lshlrev_b64 v[3:4], v3, v[4:5]
|
|
; GISEL-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v13, v8, v[0:1]
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc
|
|
; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v2
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v10, v3, 0, s[4:5]
|
|
; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v12, v7, 0
|
|
; GISEL-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v10, v7, v[5:6]
|
|
; GISEL-NEXT: v_mul_lo_u32 v14, v13, v9
|
|
; GISEL-NEXT: v_mul_lo_u32 v9, v12, v9
|
|
; GISEL-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v12, v8, v[1:2]
|
|
; GISEL-NEXT: v_mad_u64_u32 v[1:2], s[8:9], v13, v7, v[5:6]
|
|
; GISEL-NEXT: v_addc_co_u32_e64 v3, s[8:9], v3, v9, s[8:9]
|
|
; GISEL-NEXT: v_addc_co_u32_e64 v3, s[6:7], v3, v14, s[6:7]
|
|
; GISEL-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v10, v8, v[3:4]
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v3, v4, v11, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v8, v3, 0, s[4:5]
|
|
; GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v8, v7, v[5:6]
|
|
; GISEL-NEXT: ; implicit-def: $vgpr6
|
|
; GISEL-NEXT: ; implicit-def: $vgpr4
|
|
; GISEL-NEXT: ; implicit-def: $vgpr7
|
|
; GISEL-NEXT: ; implicit-def: $vgpr9
|
|
; GISEL-NEXT: ; implicit-def: $vgpr8
|
|
; GISEL-NEXT: .LBB2_3: ; %Flow
|
|
; GISEL-NEXT: s_andn2_saveexec_b64 s[4:5], s[12:13]
|
|
; GISEL-NEXT: s_cbranch_execz .LBB2_5
|
|
; GISEL-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
|
|
; GISEL-NEXT: v_sub_u32_e32 v0, 0x96, v6
|
|
; GISEL-NEXT: v_lshrrev_b32_e32 v6, v0, v4
|
|
; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v6, v7, 0
|
|
; GISEL-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v6, v9, 0
|
|
; GISEL-NEXT: v_mul_lo_u32 v7, v6, v9
|
|
; GISEL-NEXT: v_mad_u64_u32 v[4:5], vcc, v6, v8, v[1:2]
|
|
; GISEL-NEXT: v_addc_co_u32_e32 v3, vcc, v3, v7, vcc
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, v4
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, v5
|
|
; GISEL-NEXT: .LBB2_5: ; %Flow1
|
|
; GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
|
|
; GISEL-NEXT: .LBB2_6: ; %fp-to-i-cleanup
|
|
; GISEL-NEXT: s_or_b64 exec, exec, s[10:11]
|
|
; GISEL-NEXT: s_setpc_b64 s[30:31]
|
|
%cvt = fptosi float %x to i128
|
|
ret i128 %cvt
|
|
}
|
|
|
|
define i128 @fptoui_f32_to_i128(float %x) {
|
|
; SDAG-LABEL: fptoui_f32_to_i128:
|
|
; SDAG: ; %bb.0: ; %fp-to-i-entry
|
|
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; SDAG-NEXT: v_mov_b32_e32 v4, v0
|
|
; SDAG-NEXT: v_bfe_u32 v6, v4, 23, 8
|
|
; SDAG-NEXT: s_movk_i32 s4, 0x7e
|
|
; SDAG-NEXT: v_mov_b32_e32 v0, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v2, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v3, 0
|
|
; SDAG-NEXT: v_cmp_lt_u32_e32 vcc, s4, v6
|
|
; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc
|
|
; SDAG-NEXT: s_cbranch_execz .LBB3_6
|
|
; SDAG-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
|
|
; SDAG-NEXT: v_and_b32_e32 v0, 0x7fffff, v4
|
|
; SDAG-NEXT: s_movk_i32 s4, 0x95
|
|
; SDAG-NEXT: v_or_b32_e32 v4, 0x800000, v0
|
|
; SDAG-NEXT: v_cmp_lt_u32_e32 vcc, s4, v6
|
|
; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1
|
|
; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3
|
|
; SDAG-NEXT: s_and_saveexec_b64 s[4:5], vcc
|
|
; SDAG-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
|
|
; SDAG-NEXT: s_cbranch_execz .LBB3_3
|
|
; SDAG-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
|
|
; SDAG-NEXT: v_mov_b32_e32 v5, 0
|
|
; SDAG-NEXT: v_sub_u32_e32 v0, 0xd6, v6
|
|
; SDAG-NEXT: v_add_u32_e32 v2, 0xffffff2a, v6
|
|
; SDAG-NEXT: v_add_u32_e32 v7, 0xffffff6a, v6
|
|
; SDAG-NEXT: v_lshrrev_b64 v[0:1], v0, v[4:5]
|
|
; SDAG-NEXT: v_lshlrev_b64 v[2:3], v2, v[4:5]
|
|
; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v7
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
|
|
; SDAG-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v7
|
|
; SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v1, s[4:5]
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc
|
|
; SDAG-NEXT: v_lshlrev_b64 v[0:1], v7, v[4:5]
|
|
; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[4:5]
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
|
|
; SDAG-NEXT: ; implicit-def: $vgpr6
|
|
; SDAG-NEXT: ; implicit-def: $vgpr4
|
|
; SDAG-NEXT: .LBB3_3: ; %Flow
|
|
; SDAG-NEXT: s_andn2_saveexec_b64 s[4:5], s[8:9]
|
|
; SDAG-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
|
|
; SDAG-NEXT: v_sub_u32_e32 v0, 0x96, v6
|
|
; SDAG-NEXT: v_lshrrev_b32_e32 v0, v0, v4
|
|
; SDAG-NEXT: v_mov_b32_e32 v2, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v3, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, 0
|
|
; SDAG-NEXT: ; %bb.5: ; %Flow1
|
|
; SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
|
|
; SDAG-NEXT: .LBB3_6: ; %fp-to-i-cleanup
|
|
; SDAG-NEXT: s_or_b64 exec, exec, s[6:7]
|
|
; SDAG-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GISEL-LABEL: fptoui_f32_to_i128:
|
|
; GISEL: ; %bb.0: ; %fp-to-i-entry
|
|
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GISEL-NEXT: v_mov_b32_e32 v4, v0
|
|
; GISEL-NEXT: v_bfe_u32 v6, v4, 23, 8
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x7f
|
|
; GISEL-NEXT: s_mov_b64 s[4:5], 0
|
|
; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v6, v0
|
|
; GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, s4
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, s5
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, s6
|
|
; GISEL-NEXT: v_mov_b32_e32 v3, s7
|
|
; GISEL-NEXT: s_and_saveexec_b64 s[4:5], vcc
|
|
; GISEL-NEXT: s_cbranch_execz .LBB3_6
|
|
; GISEL-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x7fffff
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, 0x800000
|
|
; GISEL-NEXT: v_and_or_b32 v4, v4, v0, v1
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x96
|
|
; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v6, v0
|
|
; GISEL-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
|
|
; GISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
|
|
; GISEL-NEXT: s_cbranch_execz .LBB3_3
|
|
; GISEL-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
|
|
; GISEL-NEXT: v_add_u32_e32 v7, 0xffffff6a, v6
|
|
; GISEL-NEXT: v_mov_b32_e32 v5, 0
|
|
; GISEL-NEXT: v_add_u32_e32 v6, 0xffffff2a, v6
|
|
; GISEL-NEXT: v_sub_u32_e32 v2, 64, v7
|
|
; GISEL-NEXT: v_lshlrev_b64 v[0:1], v7, v[4:5]
|
|
; GISEL-NEXT: v_lshrrev_b64 v[2:3], v2, v[4:5]
|
|
; GISEL-NEXT: v_lshlrev_b64 v[4:5], v6, v[4:5]
|
|
; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v7
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc
|
|
; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v7
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v2, v2, 0, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v3, v3, 0, vcc
|
|
; GISEL-NEXT: ; implicit-def: $vgpr6
|
|
; GISEL-NEXT: ; implicit-def: $vgpr4
|
|
; GISEL-NEXT: .LBB3_3: ; %Flow
|
|
; GISEL-NEXT: s_andn2_saveexec_b64 s[6:7], s[6:7]
|
|
; GISEL-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
|
|
; GISEL-NEXT: v_sub_u32_e32 v0, 0x96, v6
|
|
; GISEL-NEXT: v_lshrrev_b32_e32 v0, v0, v4
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, 0
|
|
; GISEL-NEXT: v_mov_b32_e32 v3, 0
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, 0
|
|
; GISEL-NEXT: ; %bb.5: ; %Flow1
|
|
; GISEL-NEXT: s_or_b64 exec, exec, s[6:7]
|
|
; GISEL-NEXT: .LBB3_6: ; %fp-to-i-cleanup
|
|
; GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
|
|
; GISEL-NEXT: s_setpc_b64 s[30:31]
|
|
%cvt = fptoui float %x to i128
|
|
ret i128 %cvt
|
|
}
|
|
|
|
define i128 @fptosi_f16_to_i128(half %x) {
|
|
; SDAG-LABEL: fptosi_f16_to_i128:
|
|
; SDAG: ; %bb.0:
|
|
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
|
|
; SDAG-NEXT: v_cvt_i32_f32_e32 v0, v0
|
|
; SDAG-NEXT: v_ashrrev_i32_e32 v1, 31, v0
|
|
; SDAG-NEXT: v_ashrrev_i32_e32 v2, 31, v1
|
|
; SDAG-NEXT: v_mov_b32_e32 v3, v2
|
|
; SDAG-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GISEL-LABEL: fptosi_f16_to_i128:
|
|
; GISEL: ; %bb.0:
|
|
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
|
|
; GISEL-NEXT: v_cvt_i32_f32_e32 v0, v0
|
|
; GISEL-NEXT: v_ashrrev_i32_e32 v1, 31, v0
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, v1
|
|
; GISEL-NEXT: v_mov_b32_e32 v3, v1
|
|
; GISEL-NEXT: s_setpc_b64 s[30:31]
|
|
%cvt = fptosi half %x to i128
|
|
ret i128 %cvt
|
|
}
|
|
|
|
define i128 @fptoui_f16_to_i128(half %x) {
|
|
; GCN-LABEL: fptoui_f16_to_i128:
|
|
; GCN: ; %bb.0:
|
|
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GCN-NEXT: v_cvt_f32_f16_e32 v0, v0
|
|
; GCN-NEXT: v_mov_b32_e32 v1, 0
|
|
; GCN-NEXT: v_mov_b32_e32 v2, 0
|
|
; GCN-NEXT: v_mov_b32_e32 v3, 0
|
|
; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
|
|
; GCN-NEXT: s_setpc_b64 s[30:31]
|
|
%cvt = fptoui half %x to i128
|
|
ret i128 %cvt
|
|
}
|
|
|
|
define i128 @fptosi_bf16_to_i128(bfloat %x) {
|
|
; SDAG-LABEL: fptosi_bf16_to_i128:
|
|
; SDAG: ; %bb.0: ; %fp-to-i-entry
|
|
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; SDAG-NEXT: v_mov_b32_e32 v4, v0
|
|
; SDAG-NEXT: v_bfe_u32 v8, v4, 7, 8
|
|
; SDAG-NEXT: s_movk_i32 s4, 0x7e
|
|
; SDAG-NEXT: v_mov_b32_e32 v0, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v2, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v3, 0
|
|
; SDAG-NEXT: v_cmp_lt_u16_e32 vcc, s4, v8
|
|
; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc
|
|
; SDAG-NEXT: s_cbranch_execz .LBB6_6
|
|
; SDAG-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
|
|
; SDAG-NEXT: v_ashrrev_i16_e32 v0, 15, v4
|
|
; SDAG-NEXT: v_bfe_i32 v7, v0, 0, 16
|
|
; SDAG-NEXT: v_and_b32_e32 v0, 0x7f, v4
|
|
; SDAG-NEXT: s_movk_i32 s5, 0x85
|
|
; SDAG-NEXT: s_mov_b32 s4, 0
|
|
; SDAG-NEXT: v_ashrrev_i32_e32 v6, 31, v7
|
|
; SDAG-NEXT: v_or_b32_e32 v5, 1, v7
|
|
; SDAG-NEXT: v_or_b32_e32 v4, 0x80, v0
|
|
; SDAG-NEXT: v_cmp_lt_u16_e32 vcc, s5, v8
|
|
; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1
|
|
; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3
|
|
; SDAG-NEXT: s_and_saveexec_b64 s[8:9], vcc
|
|
; SDAG-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
|
|
; SDAG-NEXT: s_cbranch_execz .LBB6_3
|
|
; SDAG-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
|
|
; SDAG-NEXT: v_add_u16_e32 v10, 0xff7a, v8
|
|
; SDAG-NEXT: v_and_b32_e32 v0, 0xffff, v4
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, s4
|
|
; SDAG-NEXT: v_sub_u32_e32 v2, 64, v10
|
|
; SDAG-NEXT: v_lshrrev_b64 v[3:4], v2, v[0:1]
|
|
; SDAG-NEXT: v_subrev_u32_e32 v2, 64, v10
|
|
; SDAG-NEXT: v_lshlrev_b64 v[8:9], v2, v[0:1]
|
|
; SDAG-NEXT: v_cmp_gt_u16_e32 vcc, 64, v10
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v4, v9, v4, vcc
|
|
; SDAG-NEXT: v_cmp_ne_u16_e64 s[4:5], 0, v10
|
|
; SDAG-NEXT: v_cndmask_b32_e64 v9, 0, v4, s[4:5]
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v8, v8, v3, vcc
|
|
; SDAG-NEXT: v_lshlrev_b64 v[3:4], v10, v[0:1]
|
|
; SDAG-NEXT: v_cndmask_b32_e64 v8, 0, v8, s[4:5]
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v10, 0, v3, vcc
|
|
; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v10, v5, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v2, 0
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v13, 0, v4, vcc
|
|
; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v13, v5, v[1:2]
|
|
; SDAG-NEXT: v_mul_lo_u32 v11, v6, v8
|
|
; SDAG-NEXT: v_mul_lo_u32 v12, v5, v9
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, v3
|
|
; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v10, v6, v[1:2]
|
|
; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v5, v8, 0
|
|
; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v4, v2
|
|
; SDAG-NEXT: v_add3_u32 v9, v9, v12, v11
|
|
; SDAG-NEXT: v_addc_co_u32_e64 v3, s[4:5], 0, 0, vcc
|
|
; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v7, v10, v[8:9]
|
|
; SDAG-NEXT: v_mul_lo_u32 v5, v7, v13
|
|
; SDAG-NEXT: v_mul_lo_u32 v7, v7, v10
|
|
; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v13, v6, v[2:3]
|
|
; SDAG-NEXT: v_add3_u32 v4, v7, v9, v5
|
|
; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v2, v8
|
|
; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, v3, v4, vcc
|
|
; SDAG-NEXT: ; implicit-def: $vgpr8
|
|
; SDAG-NEXT: ; implicit-def: $vgpr4
|
|
; SDAG-NEXT: ; implicit-def: $vgpr5
|
|
; SDAG-NEXT: .LBB6_3: ; %Flow
|
|
; SDAG-NEXT: s_andn2_saveexec_b64 s[4:5], s[8:9]
|
|
; SDAG-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
|
|
; SDAG-NEXT: v_sub_u16_e32 v0, 0x86, v8
|
|
; SDAG-NEXT: v_lshrrev_b16_e32 v0, v0, v4
|
|
; SDAG-NEXT: v_mul_hi_i32_i24_e32 v1, v0, v5
|
|
; SDAG-NEXT: v_ashrrev_i32_e32 v2, 31, v1
|
|
; SDAG-NEXT: v_mul_i32_i24_e32 v0, v0, v5
|
|
; SDAG-NEXT: v_mov_b32_e32 v3, v2
|
|
; SDAG-NEXT: ; %bb.5: ; %Flow1
|
|
; SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
|
|
; SDAG-NEXT: .LBB6_6: ; %fp-to-i-cleanup
|
|
; SDAG-NEXT: s_or_b64 exec, exec, s[6:7]
|
|
; SDAG-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GISEL-LABEL: fptosi_bf16_to_i128:
|
|
; GISEL: ; %bb.0: ; %fp-to-i-entry
|
|
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GISEL-NEXT: v_mov_b32_e32 v4, v0
|
|
; GISEL-NEXT: v_lshrrev_b16_e32 v6, 7, v4
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x7f
|
|
; GISEL-NEXT: s_mov_b64 s[4:5], 0
|
|
; GISEL-NEXT: v_cmp_ge_u16_sdwa s[8:9], v6, v0 src0_sel:BYTE_0 src1_sel:DWORD
|
|
; GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, s4
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, s5
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, s6
|
|
; GISEL-NEXT: v_mov_b32_e32 v3, s7
|
|
; GISEL-NEXT: s_and_saveexec_b64 s[10:11], s[8:9]
|
|
; GISEL-NEXT: s_cbranch_execz .LBB6_6
|
|
; GISEL-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
|
|
; GISEL-NEXT: v_cmp_ge_i16_e32 vcc, -1, v4
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
|
|
; GISEL-NEXT: v_and_b32_e32 v0, 1, v0
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v2, 1, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v2
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v3, 2, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v0, v2
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v3
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v7, 3, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v3
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v7
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v8, 4, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v7
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v8
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v9, 5, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v8
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v9
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v10, 6, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v9
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v10
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v11, 7, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v10
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v11
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v12, 8, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v11
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v12
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v13, 9, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v12
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v13
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v14, 10, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v13
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v14
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v15, 11, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v14
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v15
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v16, 12, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v15
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v16
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v17, 13, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v16
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v17
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v18, 14, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v17
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v18
|
|
; GISEL-NEXT: v_lshlrev_b16_e32 v0, 15, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v2, v2, v18
|
|
; GISEL-NEXT: v_or_b32_e32 v1, v1, v0
|
|
; GISEL-NEXT: v_or_b32_e32 v0, v2, v0
|
|
; GISEL-NEXT: v_and_b32_e32 v9, 0xffff, v0
|
|
; GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v1
|
|
; GISEL-NEXT: v_lshlrev_b32_e32 v0, 16, v9
|
|
; GISEL-NEXT: v_or3_b32 v7, v1, v0, 1
|
|
; GISEL-NEXT: v_or3_b32 v8, v9, v0, 0
|
|
; GISEL-NEXT: v_and_b32_e32 v0, 0x7f, v4
|
|
; GISEL-NEXT: v_or_b32_e32 v4, 0x80, v0
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x86
|
|
; GISEL-NEXT: v_mov_b32_e32 v5, 0
|
|
; GISEL-NEXT: v_cmp_ge_u16_sdwa s[4:5], v6, v0 src0_sel:BYTE_0 src1_sel:DWORD
|
|
; GISEL-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GISEL-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
|
|
; GISEL-NEXT: s_xor_b64 s[12:13], exec, s[6:7]
|
|
; GISEL-NEXT: s_cbranch_execz .LBB6_3
|
|
; GISEL-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0xffffff7a
|
|
; GISEL-NEXT: v_add_u16_sdwa v2, v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
; GISEL-NEXT: v_and_b32_e32 v4, 0xffff, v4
|
|
; GISEL-NEXT: v_lshlrev_b64 v[0:1], v2, v[4:5]
|
|
; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v2
|
|
; GISEL-NEXT: v_lshl_or_b32 v11, v9, 16, v9
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v12, 0, v0, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v13, 0, v1, vcc
|
|
; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v12, v11, 0
|
|
; GISEL-NEXT: v_add_u32_e32 v3, 0xffffffc0, v2
|
|
; GISEL-NEXT: v_sub_u32_e32 v6, 64, v2
|
|
; GISEL-NEXT: v_lshrrev_b64 v[9:10], v6, v[4:5]
|
|
; GISEL-NEXT: v_lshlrev_b64 v[3:4], v3, v[4:5]
|
|
; GISEL-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v13, v8, v[0:1]
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v3, v3, v9, vcc
|
|
; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v2
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v9, v3, 0, s[4:5]
|
|
; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v12, v7, 0
|
|
; GISEL-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v9, v7, v[5:6]
|
|
; GISEL-NEXT: v_mul_lo_u32 v14, v13, v11
|
|
; GISEL-NEXT: v_mul_lo_u32 v11, v12, v11
|
|
; GISEL-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v12, v8, v[1:2]
|
|
; GISEL-NEXT: v_mad_u64_u32 v[1:2], s[8:9], v13, v7, v[5:6]
|
|
; GISEL-NEXT: v_addc_co_u32_e64 v3, s[8:9], v3, v11, s[8:9]
|
|
; GISEL-NEXT: v_addc_co_u32_e64 v3, s[6:7], v3, v14, s[6:7]
|
|
; GISEL-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v9, v8, v[3:4]
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v3, v4, v10, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v8, v3, 0, s[4:5]
|
|
; GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v8, v7, v[5:6]
|
|
; GISEL-NEXT: ; implicit-def: $vgpr6
|
|
; GISEL-NEXT: ; implicit-def: $vgpr4
|
|
; GISEL-NEXT: ; implicit-def: $vgpr7
|
|
; GISEL-NEXT: .LBB6_3: ; %Flow
|
|
; GISEL-NEXT: s_andn2_saveexec_b64 s[4:5], s[12:13]
|
|
; GISEL-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x86
|
|
; GISEL-NEXT: v_sub_u16_sdwa v0, v0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
; GISEL-NEXT: v_lshrrev_b16_e32 v0, v0, v4
|
|
; GISEL-NEXT: v_mul_hi_i32_i24_e32 v1, v0, v7
|
|
; GISEL-NEXT: v_ashrrev_i32_e32 v2, 31, v1
|
|
; GISEL-NEXT: v_mul_i32_i24_e32 v0, v0, v7
|
|
; GISEL-NEXT: v_mov_b32_e32 v3, v2
|
|
; GISEL-NEXT: ; %bb.5: ; %Flow1
|
|
; GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
|
|
; GISEL-NEXT: .LBB6_6: ; %fp-to-i-cleanup
|
|
; GISEL-NEXT: s_or_b64 exec, exec, s[10:11]
|
|
; GISEL-NEXT: s_setpc_b64 s[30:31]
|
|
%cvt = fptosi bfloat %x to i128
|
|
ret i128 %cvt
|
|
}
|
|
|
|
define i128 @fptoui_bf16_to_i128(bfloat %x) {
|
|
; SDAG-LABEL: fptoui_bf16_to_i128:
|
|
; SDAG: ; %bb.0: ; %fp-to-i-entry
|
|
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; SDAG-NEXT: v_mov_b32_e32 v4, v0
|
|
; SDAG-NEXT: v_bfe_u32 v5, v4, 7, 8
|
|
; SDAG-NEXT: s_movk_i32 s4, 0x7e
|
|
; SDAG-NEXT: v_mov_b32_e32 v0, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v2, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v3, 0
|
|
; SDAG-NEXT: v_cmp_lt_u16_e32 vcc, s4, v5
|
|
; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc
|
|
; SDAG-NEXT: s_cbranch_execz .LBB7_6
|
|
; SDAG-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
|
|
; SDAG-NEXT: v_and_b32_e32 v0, 0x7f, v4
|
|
; SDAG-NEXT: s_movk_i32 s4, 0x85
|
|
; SDAG-NEXT: v_or_b32_e32 v4, 0x80, v0
|
|
; SDAG-NEXT: v_cmp_lt_u16_e32 vcc, s4, v5
|
|
; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1
|
|
; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3
|
|
; SDAG-NEXT: s_and_saveexec_b64 s[4:5], vcc
|
|
; SDAG-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
|
|
; SDAG-NEXT: s_cbranch_execz .LBB7_3
|
|
; SDAG-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
|
|
; SDAG-NEXT: v_add_u16_e32 v6, 0xff7a, v5
|
|
; SDAG-NEXT: s_mov_b32 s4, 0
|
|
; SDAG-NEXT: v_and_b32_e32 v0, 0xffff, v4
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, s4
|
|
; SDAG-NEXT: v_sub_u32_e32 v2, 64, v6
|
|
; SDAG-NEXT: v_subrev_u32_e32 v4, 64, v6
|
|
; SDAG-NEXT: v_lshrrev_b64 v[2:3], v2, v[0:1]
|
|
; SDAG-NEXT: v_lshlrev_b64 v[4:5], v4, v[0:1]
|
|
; SDAG-NEXT: v_cmp_gt_u16_e32 vcc, 64, v6
|
|
; SDAG-NEXT: v_lshlrev_b64 v[0:1], v6, v[0:1]
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc
|
|
; SDAG-NEXT: v_cmp_ne_u16_e64 s[4:5], 0, v6
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc
|
|
; SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5]
|
|
; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[4:5]
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
|
; SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
|
|
; SDAG-NEXT: ; implicit-def: $vgpr5
|
|
; SDAG-NEXT: ; implicit-def: $vgpr4
|
|
; SDAG-NEXT: .LBB7_3: ; %Flow
|
|
; SDAG-NEXT: s_andn2_saveexec_b64 s[4:5], s[8:9]
|
|
; SDAG-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
|
|
; SDAG-NEXT: v_sub_u16_e32 v0, 0x86, v5
|
|
; SDAG-NEXT: v_lshrrev_b16_e32 v0, v0, v4
|
|
; SDAG-NEXT: v_mov_b32_e32 v2, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v3, 0
|
|
; SDAG-NEXT: v_mov_b32_e32 v1, 0
|
|
; SDAG-NEXT: ; %bb.5: ; %Flow1
|
|
; SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
|
|
; SDAG-NEXT: .LBB7_6: ; %fp-to-i-cleanup
|
|
; SDAG-NEXT: s_or_b64 exec, exec, s[6:7]
|
|
; SDAG-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GISEL-LABEL: fptoui_bf16_to_i128:
|
|
; GISEL: ; %bb.0: ; %fp-to-i-entry
|
|
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GISEL-NEXT: v_mov_b32_e32 v4, v0
|
|
; GISEL-NEXT: v_lshrrev_b16_e32 v5, 7, v4
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x7f
|
|
; GISEL-NEXT: s_mov_b64 s[4:5], 0
|
|
; GISEL-NEXT: v_cmp_ge_u16_sdwa s[8:9], v5, v0 src0_sel:BYTE_0 src1_sel:DWORD
|
|
; GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, s4
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, s5
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, s6
|
|
; GISEL-NEXT: v_mov_b32_e32 v3, s7
|
|
; GISEL-NEXT: s_and_saveexec_b64 s[4:5], s[8:9]
|
|
; GISEL-NEXT: s_cbranch_execz .LBB7_6
|
|
; GISEL-NEXT: ; %bb.1: ; %fp-to-i-if-check.exp.size
|
|
; GISEL-NEXT: v_and_b32_e32 v0, 0x7f, v4
|
|
; GISEL-NEXT: v_or_b32_e32 v4, 0x80, v0
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x86
|
|
; GISEL-NEXT: v_cmp_ge_u16_sdwa s[6:7], v5, v0 src0_sel:BYTE_0 src1_sel:DWORD
|
|
; GISEL-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GISEL-NEXT: s_and_saveexec_b64 s[8:9], s[6:7]
|
|
; GISEL-NEXT: s_xor_b64 s[6:7], exec, s[8:9]
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|
; GISEL-NEXT: s_cbranch_execz .LBB7_3
|
|
; GISEL-NEXT: ; %bb.2: ; %fp-to-i-if-exp.large
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0xffffff7a
|
|
; GISEL-NEXT: v_add_u16_sdwa v8, v5, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
; GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v4
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, 0
|
|
; GISEL-NEXT: v_add_u32_e32 v6, 0xffffffc0, v8
|
|
; GISEL-NEXT: v_sub_u32_e32 v4, 64, v8
|
|
; GISEL-NEXT: v_lshlrev_b64 v[2:3], v8, v[0:1]
|
|
; GISEL-NEXT: v_lshrrev_b64 v[4:5], v4, v[0:1]
|
|
; GISEL-NEXT: v_lshlrev_b64 v[6:7], v6, v[0:1]
|
|
; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v8
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v2, v6, v4, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e32 v3, v7, v5, vcc
|
|
; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v8
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v2, v2, 0, vcc
|
|
; GISEL-NEXT: v_cndmask_b32_e64 v3, v3, 0, vcc
|
|
; GISEL-NEXT: ; implicit-def: $vgpr5
|
|
; GISEL-NEXT: ; implicit-def: $vgpr4
|
|
; GISEL-NEXT: .LBB7_3: ; %Flow
|
|
; GISEL-NEXT: s_andn2_saveexec_b64 s[6:7], s[6:7]
|
|
; GISEL-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
|
|
; GISEL-NEXT: v_mov_b32_e32 v0, 0x86
|
|
; GISEL-NEXT: v_sub_u16_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
; GISEL-NEXT: v_lshrrev_b16_e32 v0, v0, v4
|
|
; GISEL-NEXT: v_mov_b32_e32 v2, 0
|
|
; GISEL-NEXT: v_mov_b32_e32 v3, 0
|
|
; GISEL-NEXT: v_mov_b32_e32 v1, 0
|
|
; GISEL-NEXT: ; %bb.5: ; %Flow1
|
|
; GISEL-NEXT: s_or_b64 exec, exec, s[6:7]
|
|
; GISEL-NEXT: .LBB7_6: ; %fp-to-i-cleanup
|
|
; GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
|
|
; GISEL-NEXT: s_setpc_b64 s[30:31]
|
|
%cvt = fptoui bfloat %x to i128
|
|
ret i128 %cvt
|
|
}
|