2502e3b7ba
Convert "denormal-fp-math" and "denormal-fp-math-f32" into a first class denormal_fpenv attribute. Previously the query for the effective denormal mode involved two string attribute queries with parsing. I'm introducing more uses of this, so it makes sense to convert this to a more efficient encoding. The old representation was also awkward since it was split across two separate attributes. The new encoding just stores the default and float modes as bitfields, largely avoiding the need to consider if the other mode is set. The syntax in the common cases looks like this: `denormal_fpenv(preservesign,preservesign)` `denormal_fpenv(float: preservesign,preservesign)` `denormal_fpenv(dynamic,dynamic float: preservesign,preservesign)` I wasn't sure about reusing the float type name instead of adding a new keyword. It's parsed as a type but only accepts float. I'm also debating switching the name to subnormal to match the current preferred IEEE terminology (also used by nofpclass and other contexts). This has a behavior change when using the command flag debug options to set the denormal mode. The behavior of the flag ignored functions with an explicit attribute set, per the default and f32 version. Now that these are one attribute, the flag logic can't distinguish which of the two components were explicitly set on the function. Only one test appeared to rely on this behavior, so I just avoided using the flags in it. This also does not perform all the code cleanups this enables. In particular the attributor handling could be cleaned up. I also guessed at how to support this in MLIR. I followed MemoryEffects as a reference; it appears bitfields are expanded into arguments to attributes, so the representation there is a bit uglier with the 2 2-element fields flattened into 4 arguments.
39 lines
1.8 KiB
LLVM
39 lines
1.8 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=gfx803 < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx803 -filetype=obj < %s | llvm-objdump --triple=amdgcn--amdhsa --mcpu=gfx803 -d - | FileCheck -check-prefix=DISASSEMBLY-VI %s
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; Make sure we can encode and don't fail on functions which have
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; instructions not actually supported by the subtarget.
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; FIXME: This will still fail for gfx6/7 and gfx10 subtargets.
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; DISASSEMBLY-VI: .long 0xdd348000 // {{[0-9A-Z]+}}: DD348000
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; DISASSEMBLY-VI-NEXT: v_cndmask_b32_e32 v1, v0, v0, vcc // {{[0-9A-Z]+}}: 00020100
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define amdgpu_kernel void @global_atomic_fadd_noret_f32_wrong_subtarget(ptr addrspace(1) %ptr) #0 {
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; GCN-LABEL: global_atomic_fadd_noret_f32_wrong_subtarget:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_mov_b64 s[0:1], exec
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; GCN-NEXT: v_mbcnt_lo_u32_b32 v0, s0, 0
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; GCN-NEXT: v_mbcnt_hi_u32_b32 v0, s1, v0
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; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
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; GCN-NEXT: s_and_saveexec_b64 s[2:3], vcc
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; GCN-NEXT: s_cbranch_execz .LBB0_2
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; GCN-NEXT: ; %bb.1:
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; GCN-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
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; GCN-NEXT: s_bcnt1_i32_b64 s0, s[0:1]
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; GCN-NEXT: v_cvt_f32_ubyte0_e32 v1, s0
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; GCN-NEXT: v_mov_b32_e32 v0, 0
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; GCN-NEXT: v_mul_f32_e32 v1, 4.0, v1
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: global_atomic_add_f32 v0, v1, s[2:3]
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: buffer_wbinvl1_vol
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; GCN-NEXT: .LBB0_2:
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; GCN-NEXT: s_endpgm
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%result = atomicrmw fadd ptr addrspace(1) %ptr, float 4.0 syncscope("agent") seq_cst, !amdgpu.no.fine.grained.memory !0, !amdgpu.ignore.denormal.mode !0
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ret void
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}
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attributes #0 = { denormal_fpenv(float: preservesign) "target-features"="+atomic-fadd-no-rtn-insts" }
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!0 = !{}
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