fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
65 lines
3.1 KiB
LLVM
65 lines
3.1 KiB
LLVM
;RUN: llc < %s -mtriple=amdgcn -mcpu=tonga | FileCheck %s -check-prefix=CHECK
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;CHECK-LABEL: {{^}}raw_buffer_store_format_immoffs_x3:
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;CHECK-NOT: s_waitcnt
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;CHECK: buffer_store_format_xyz v[0:2], off, s[0:3], 0 offset:42
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define amdgpu_ps void @raw_buffer_store_format_immoffs_x3(<4 x i32> inreg, <3 x float>) {
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main_body:
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call void @llvm.amdgcn.raw.buffer.store.format.v3f32(<3 x float> %1, <4 x i32> %0, i32 42, i32 0, i32 0)
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ret void
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}
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;CHECK-LABEL: {{^}}raw_buffer_store_immoffs_x3:
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;CHECK-NOT: s_waitcnt
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;CHECK: buffer_store_dwordx3 v[0:2], off, s[0:3], 0 offset:42
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define amdgpu_ps void @raw_buffer_store_immoffs_x3(<4 x i32> inreg, <3 x float>) {
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main_body:
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call void @llvm.amdgcn.raw.buffer.store.v3f32(<3 x float> %1, <4 x i32> %0, i32 42, i32 0, i32 0)
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ret void
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}
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;CHECK-LABEL: {{^}}struct_buffer_store_immoffs_x3:
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;CHECK-NOT: s_waitcnt
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;CHECK: buffer_store_dwordx3 v[0:2], {{v[0-9]+}}, s[0:3], 0 idxen offset:42
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define amdgpu_ps void @struct_buffer_store_immoffs_x3(<4 x i32> inreg, <3 x float>) {
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main_body:
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call void @llvm.amdgcn.struct.buffer.store.v3f32(<3 x float> %1, <4 x i32> %0, i32 0, i32 42, i32 0, i32 0)
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ret void
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}
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;CHECK-LABEL: {{^}}raw_ptr_buffer_store_format_immoffs_x3:
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;CHECK-NOT: s_waitcnt
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;CHECK: buffer_store_format_xyz v[0:2], off, s[0:3], 0 offset:42
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define amdgpu_ps void @raw_ptr_buffer_store_format_immoffs_x3(ptr addrspace(8) inreg, <3 x float>) {
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main_body:
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call void @llvm.amdgcn.raw.ptr.buffer.store.format.v3f32(<3 x float> %1, ptr addrspace(8) %0, i32 42, i32 0, i32 0)
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ret void
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}
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;CHECK-LABEL: {{^}}raw_ptr_buffer_store_immoffs_x3:
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;CHECK-NOT: s_waitcnt
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;CHECK: buffer_store_dwordx3 v[0:2], off, s[0:3], 0 offset:42
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define amdgpu_ps void @raw_ptr_buffer_store_immoffs_x3(ptr addrspace(8) inreg, <3 x float>) {
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main_body:
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call void @llvm.amdgcn.raw.ptr.buffer.store.v3f32(<3 x float> %1, ptr addrspace(8) %0, i32 42, i32 0, i32 0)
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ret void
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}
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;CHECK-LABEL: {{^}}struct_ptr_buffer_store_immoffs_x3:
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;CHECK-NOT: s_waitcnt
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;CHECK: buffer_store_dwordx3 v[0:2], {{v[0-9]+}}, s[0:3], 0 idxen offset:42
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define amdgpu_ps void @struct_ptr_buffer_store_immoffs_x3(ptr addrspace(8) inreg, <3 x float>) {
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main_body:
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call void @llvm.amdgcn.struct.ptr.buffer.store.v3f32(<3 x float> %1, ptr addrspace(8) %0, i32 0, i32 42, i32 0, i32 0)
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ret void
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}
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declare void @llvm.amdgcn.raw.buffer.store.format.v3f32(<3 x float>, <4 x i32>, i32, i32, i32) #0
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declare void @llvm.amdgcn.raw.buffer.store.v3f32(<3 x float>, <4 x i32>, i32, i32, i32) #0
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declare void @llvm.amdgcn.struct.buffer.store.format.v3f32(<3 x float>, <4 x i32>, i32, i32, i32, i32) #0
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declare void @llvm.amdgcn.struct.buffer.store.v3f32(<3 x float>, <4 x i32>, i32, i32, i32, i32) #0
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declare void @llvm.amdgcn.raw.ptr.buffer.store.format.v3f32(<3 x float>, ptr addrspace(8), i32, i32, i32) #0
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declare void @llvm.amdgcn.raw.ptr.buffer.store.v3f32(<3 x float>, ptr addrspace(8), i32, i32, i32) #0
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declare void @llvm.amdgcn.struct.ptr.buffer.store.format.v3f32(<3 x float>, ptr addrspace(8), i32, i32, i32, i32) #0
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declare void @llvm.amdgcn.struct.ptr.buffer.store.v3f32(<3 x float>, ptr addrspace(8), i32, i32, i32, i32) #0
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