c6fa976d5b
The test used to look all good, but actually not. The WeakVH just make itself null after the pointed value being replaced. So a zero value was used because VarIndex become null. The test checks looks all good. Actually only the WeakTrackingVH have the ability to be updated to new value. Change the test slightly to make that using zero index is wrong.
30 lines
1.3 KiB
LLVM
30 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt -S -mtriple=amdgcn-unknown-unknown -passes=amdgpu-promote-alloca < %s | FileCheck %s
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define void @alloca_value_cross_reference() {
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; CHECK-LABEL: define void @alloca_value_cross_reference() {
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; CHECK-NEXT: [[_ENTRY:.*:]]
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; CHECK-NEXT: [[HIT_ORDERED:%.*]] = freeze <4 x float> poison
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; CHECK-NEXT: [[HIT_INDEX:%.*]] = freeze <4 x i32> poison
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> [[HIT_INDEX]], i32 1, i32 0
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; CHECK-NEXT: br [[DOTLR_PH5:label %.*]]
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; CHECK: [[_LR_PH5:.*:]]
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; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[TMP0]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[HIT_ORDERED]], float 0.000000e+00, i32 [[TMP1]]
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; CHECK-NEXT: ret void
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;
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.entry:
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%hit_ordered = alloca [4 x float], align 4, addrspace(5)
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%hit_index = alloca [4 x i32], align 4, addrspace(5)
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store i32 1, ptr addrspace(5) %hit_index, align 4
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br label %.lr.ph5
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; The separate block is needed to avoid constant-folding on
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; the load from %hit_index.
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.lr.ph5:
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%i = load i32, ptr addrspace(5) %hit_index, align 4
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%p = getelementptr float, ptr addrspace(5) %hit_ordered, i32 %i
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store float 0.000000e+00, ptr addrspace(5) %p, align 4
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ret void
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}
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