49d5bb0ad0
This PR introduces `amdgpu-lower-exec-sync` pass which specifically lowers named-barrier LDS globals introduced by #114550 . Changes include: - Moving the logic of lowering named-barrier LDS globals from `amdgpu-lower-module-lds` pass to this new pass. - This PR adds the pass to pipeline, remove the existing lowering logic for named-barrier LDS in `amdgpu-lower-module-lds` See #161827 for discussion on this topic.
75 lines
3.5 KiB
LLVM
75 lines
3.5 KiB
LLVM
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-exec-sync,amdgpu-lower-module-lds < %s 2>&1 | FileCheck %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -verify-machineinstrs -o - %s | FileCheck -check-prefixes=SOUT %s
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%class.ExpAmdWorkgroupWaveBarrier = type { target("amdgcn.named.barrier", 0) }
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@bar2 = internal addrspace(3) global [2 x target("amdgcn.named.barrier", 0)] poison
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@bar3 = internal addrspace(3) global target("amdgcn.named.barrier", 0) poison
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@bar1 = internal addrspace(3) global [4 x %class.ExpAmdWorkgroupWaveBarrier] poison
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; CHECK: @bar2 = internal addrspace(3) global [2 x target("amdgcn.named.barrier", 0)] poison, !absolute_symbol !0
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; CHECK-NEXT: @bar3 = internal addrspace(3) global target("amdgcn.named.barrier", 0) poison, !absolute_symbol !1
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; CHECK-NEXT: @bar1 = internal addrspace(3) global [4 x %class.ExpAmdWorkgroupWaveBarrier] poison, !absolute_symbol !2
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; CHECK-NEXT: @bar1.kernel1 = internal addrspace(3) global [4 x %class.ExpAmdWorkgroupWaveBarrier] poison, !absolute_symbol !2
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; SOUT: .set func1.num_named_barrier, 7
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define void @func1() {
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call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar3, i32 7)
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call void @llvm.amdgcn.s.barrier.join(ptr addrspace(3) @bar3)
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call void @llvm.amdgcn.s.barrier.wait(i16 1)
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ret void
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}
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; SOUT: .set func2.num_named_barrier, 2
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define void @func2() {
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call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar2, i32 7)
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call void @llvm.amdgcn.s.barrier.join(ptr addrspace(3) @bar2)
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call void @llvm.amdgcn.s.barrier.wait(i16 1)
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ret void
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}
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; SOUT: .amdhsa_named_barrier_count 2
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; SOUT: .set kernel1.num_named_barrier, max(6, func1.num_named_barrier, func2.num_named_barrier)
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define amdgpu_kernel void @kernel1() #0 {
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; CHECK-DAG: call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar1.kernel1, i32 11)
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call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar1, i32 11)
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call void @llvm.amdgcn.s.barrier.join(ptr addrspace(3) @bar1)
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call void @llvm.amdgcn.s.barrier.wait(i16 1)
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%state = call i32 @llvm.amdgcn.s.get.named.barrier.state(ptr addrspace(3) @bar1)
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call void @llvm.amdgcn.s.barrier()
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call void @func1()
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call void @func2()
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ret void
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}
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; SOUT: .amdhsa_named_barrier_count 2
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; SOUT: .set kernel2.num_named_barrier, max(6, func2.num_named_barrier)
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define amdgpu_kernel void @kernel2() #0 {
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; CHECK-DAG: call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar1, i32 9)
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call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar1, i32 9)
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call void @llvm.amdgcn.s.barrier.join(ptr addrspace(3) @bar1)
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call void @llvm.amdgcn.s.barrier.wait(i16 1)
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call void @func2()
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ret void
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}
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declare void @llvm.amdgcn.s.barrier() #1
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declare void @llvm.amdgcn.s.barrier.wait(i16) #1
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declare void @llvm.amdgcn.s.barrier.signal(i32) #1
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declare void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3), i32) #1
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declare i1 @llvm.amdgcn.s.barrier.signal.isfirst(i32) #1
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declare void @llvm.amdgcn.s.barrier.init(ptr addrspace(3), i32) #1
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declare void @llvm.amdgcn.s.barrier.join(ptr addrspace(3)) #1
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declare void @llvm.amdgcn.s.barrier.leave(i16) #1
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declare void @llvm.amdgcn.s.wakeup.barrier(ptr addrspace(3)) #1
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declare i32 @llvm.amdgcn.s.get.named.barrier.state(ptr addrspace(3)) #1
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attributes #0 = { nounwind }
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attributes #1 = { convergent nounwind }
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attributes #2 = { nounwind readnone }
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; CHECK: !0 = !{i32 8396816, i32 8396817}
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; CHECK-NEXT: !1 = !{i32 8396912, i32 8396913}
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; CHECK-NEXT: !2 = !{i32 8396848, i32 8396849}
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