9ad39dd116
At the moment the MIR tests are somewhat redundant. The waitcnt one is needed to ensure we actually have a load, given we are currently just emitting an error on ExternalSymbol. The asm printer one is more redundant for the moment, since it's stressed by the IR test. However I am planning to change the error path for the IR test, so it will soon not be redundant.
41 lines
1.8 KiB
YAML
41 lines
1.8 KiB
YAML
# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -start-before=amdgpu-asm-printer -o - %s 2> %t.err | FileCheck %s
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# RUN: FileCheck -check-prefix=ERR %s < %t.err
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# CHECK: ;unsupported statepoint/stackmap/patchpoint
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# ERR: error: unhandled statepoint-like instruction
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---
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name: test_statepoint
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tracksRegLiveness: true
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frameInfo:
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stackSize: 16
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maxAlignment: 4
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adjustsStack: true
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hasCalls: true
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maxCallFrameSize: 0
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isCalleeSavedInfoValid: true
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stack:
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- { id: 0, type: spill-slot, size: 4, alignment: 4 }
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machineFunctionInfo:
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hasSpilledSGPRs: true
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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body: |
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bb.0.entry:
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liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr30, $sgpr31, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11
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S_WAITCNT 0
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$sgpr16 = S_MOV_B32 $sgpr33
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$sgpr33 = S_MOV_B32 $sgpr32
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$sgpr18_sgpr19 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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BUFFER_STORE_DWORD_OFFSET $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
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$exec = S_MOV_B64 killed $sgpr18_sgpr19
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$vgpr40 = V_WRITELANE_B32 killed $sgpr16, 2, undef $vgpr40
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$vgpr40 = V_WRITELANE_B32 $sgpr30, 0, $vgpr40
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$sgpr32 = frame-setup S_ADDK_I32 $sgpr32, 1024, implicit-def dead $scc
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$vgpr40 = V_WRITELANE_B32 $sgpr31, 1, $vgpr40
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STATEPOINT 2882400015, 0, 11, undef renamable $sgpr4_sgpr5, 0, killed $sgpr4_sgpr5, killed $sgpr6_sgpr7, killed $sgpr8_sgpr9, killed $sgpr10_sgpr11, killed $sgpr12, killed $sgpr13, killed $sgpr14, killed $sgpr15, killed $vgpr31, $sgpr0_sgpr1_sgpr2_sgpr3, 2, 0, 2, 0, 2, 1, 2, 0, 2, 0, 2, 0, 2, 0, csr_amdgpu
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...
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