d57997c669
VOPC_e64 comparison instruction doesn't define VCC unlike _e32 counterparts. So this instruction should be suitable for ramaterialization.
47 lines
2.2 KiB
YAML
47 lines
2.2 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 --stress-regalloc=2 -start-before=greedy -stop-after=virtregrewriter -o - %s | FileCheck -check-prefix=GCN %s
|
|
|
|
# Test that V_CMP_*_e64 instructions are rematerialized instead of spilled.
|
|
|
|
---
|
|
name: test_vopc_e64_remat
|
|
tracksRegLiveness: true
|
|
machineFunctionInfo:
|
|
isEntryFunction: true
|
|
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
|
|
stackPtrOffsetReg: $sgpr32
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1
|
|
|
|
; GCN-LABEL: name: test_vopc_e64_remat
|
|
; GCN: liveins: $vgpr0, $vgpr1
|
|
; GCN-NEXT: {{ $}}
|
|
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GCN-NEXT: renamable $sgpr4_sgpr5 = V_CMP_GT_U32_e64 [[COPY]], [[COPY1]], implicit $exec
|
|
; GCN-NEXT: renamable $sgpr6_sgpr7 = V_CMP_LT_U32_e64 [[COPY]], [[COPY1]], implicit $exec
|
|
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
|
; GCN-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr4_sgpr5, $exec, implicit-def $scc
|
|
; GCN-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5
|
|
; GCN-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr6_sgpr7, $exec, implicit-def $scc
|
|
; GCN-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5
|
|
; GCN-NEXT: renamable $sgpr4_sgpr5 = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec
|
|
; GCN-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr4_sgpr5, $exec, implicit-def $scc
|
|
; GCN-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5, implicit [[COPY]], implicit [[COPY1]]
|
|
; GCN-NEXT: S_ENDPGM 0
|
|
%10:vgpr_32 = COPY $vgpr0
|
|
%11:vgpr_32 = COPY $vgpr1
|
|
%0:sreg_64 = V_CMP_GT_U32_e64 %10, %11, implicit $exec
|
|
%1:sreg_64 = V_CMP_LT_U32_e64 %10, %11, implicit $exec
|
|
%2:sreg_64 = V_CMP_EQ_U32_e64 %10, %11, implicit $exec
|
|
INLINEASM &"", 1 /* sideeffect attdialect */
|
|
%3:sreg_64 = S_AND_B64 %0, $exec, implicit-def $scc
|
|
S_NOP 0, implicit %3
|
|
%4:sreg_64 = S_AND_B64 %1, $exec, implicit-def $scc
|
|
S_NOP 0, implicit %4
|
|
%5:sreg_64 = S_AND_B64 %2, $exec, implicit-def $scc
|
|
S_NOP 0, implicit %5, implicit %10, implicit %11
|
|
S_ENDPGM 0
|
|
...
|