70e6e17675
Fold trunc ptrtoint/ptrtoaddr to N -> 0 when all N bits are zero due to alignment. To Avoid regression due to icmp_ne(and(x,1),0) -> trunc(x) fold https://github.com/llvm/llvm-project/issues/172888 Proof: https://alive2.llvm.org/ce/z/ZS-QJL
163 lines
5.0 KiB
LLVM
163 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s
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define i64 @base(ptr %ptr) {
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; CHECK-LABEL: define i64 @base(
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; CHECK-SAME: ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[PTR]], align 4
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; CHECK-NEXT: [[V3:%.*]] = ptrtoint ptr [[PTR]] to i64
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; CHECK-NEXT: [[V5:%.*]] = and i64 [[V3]], 2
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; CHECK-NEXT: ret i64 0
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;
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%v1 = load i32, ptr %ptr, align 4
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%v3 = ptrtoint ptr %ptr to i64
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%v5 = and i64 %v3, 2
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ret i64 %v5
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}
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define i64 @best_alignment(ptr %ptr) {
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; CHECK-LABEL: define i64 @best_alignment(
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; CHECK-SAME: ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[PTR]], align 8
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; CHECK-NEXT: [[V2:%.*]] = load i32, ptr [[PTR]], align 16
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; CHECK-NEXT: [[V3:%.*]] = ptrtoint ptr [[PTR]] to i64
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; CHECK-NEXT: [[V5:%.*]] = and i64 [[V3]], 15
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; CHECK-NEXT: ret i64 0
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;
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%v1 = load i32, ptr %ptr, align 8
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%v2 = load i32, ptr %ptr, align 16
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%v3 = ptrtoint ptr %ptr to i64
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%v5 = and i64 %v3, 15
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ret i64 %v5
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}
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declare void @func()
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define i64 @negative_test(ptr %ptr) {
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; CHECK-LABEL: define i64 @negative_test(
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; CHECK-SAME: ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[V3:%.*]] = ptrtoint ptr [[PTR]] to i64
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; CHECK-NEXT: [[V5:%.*]] = and i64 [[V3]], 2
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; CHECK-NEXT: call void @func()
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; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[PTR]], align 4
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; CHECK-NEXT: ret i64 [[V5]]
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;
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%v3 = ptrtoint ptr %ptr to i64
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%v5 = and i64 %v3, 2
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call void @func()
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%v1 = load i32, ptr %ptr, align 4
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ret i64 %v5
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}
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define i64 @ptrtoaddr(ptr %ptr) {
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; CHECK-LABEL: define i64 @ptrtoaddr(
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; CHECK-SAME: ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[V3:%.*]] = ptrtoaddr ptr [[PTR]] to i64
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; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[PTR]], align 4
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; CHECK-NEXT: [[V5:%.*]] = and i64 [[V3]], 2
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; CHECK-NEXT: ret i64 0
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;
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%v3 = ptrtoaddr ptr %ptr to i64
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%v1 = load i32, ptr %ptr, align 4
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%v5 = and i64 %v3, 2
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ret i64 %v5
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}
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define i64 @redundant_mask(ptr %ptr) {
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; CHECK-LABEL: define i64 @redundant_mask(
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; CHECK-SAME: ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[PTR]], align 4
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; CHECK-NEXT: [[INT:%.*]] = ptrtoint ptr [[PTR]] to i64
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; CHECK-NEXT: [[MASK:%.*]] = and i64 [[INT]], -4
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; CHECK-NEXT: ret i64 [[INT]]
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;
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%load = load i32, ptr %ptr, align 4
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%int = ptrtoint ptr %ptr to i64
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%mask = and i64 %int, -4
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ret i64 %mask
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}
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define i64 @redundant_mask2(ptr %ptr) {
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; CHECK-LABEL: define i64 @redundant_mask2(
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; CHECK-SAME: ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[PTR]], align 4
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; CHECK-NEXT: [[INT:%.*]] = ptrtoint ptr [[PTR]] to i64
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; CHECK-NEXT: [[MASK:%.*]] = and i64 [[INT]], -3
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; CHECK-NEXT: ret i64 [[INT]]
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;
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%load = load i32, ptr %ptr, align 4
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%int = ptrtoint ptr %ptr to i64
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%mask = and i64 %int, -3
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ret i64 %mask
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}
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define i64 @not_redundant_mask(ptr %ptr) {
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; CHECK-LABEL: define i64 @not_redundant_mask(
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; CHECK-SAME: ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[PTR]], align 4
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; CHECK-NEXT: [[INT:%.*]] = ptrtoint ptr [[PTR]] to i64
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; CHECK-NEXT: [[MASK:%.*]] = and i64 [[INT]], -5
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; CHECK-NEXT: ret i64 [[MASK]]
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;
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%load = load i32, ptr %ptr, align 4
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%int = ptrtoint ptr %ptr to i64
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%mask = and i64 %int, -5
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ret i64 %mask
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}
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define i1 @trunc1_ptrtoint(ptr %ptr) {
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; CHECK-LABEL: define i1 @trunc1_ptrtoint(
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; CHECK-SAME: ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[LOAD:%.*]] = load i16, ptr [[PTR]], align 2
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; CHECK-NEXT: [[INT:%.*]] = ptrtoint ptr [[PTR]] to i64
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[INT]] to i1
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; CHECK-NEXT: ret i1 false
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;
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%load = load i16, ptr %ptr, align 2
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%int = ptrtoint ptr %ptr to i64
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%trunc = trunc i64 %int to i1
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ret i1 %trunc
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}
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define i1 @neg_trunc1_ptrtoint(ptr %ptr) {
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; CHECK-LABEL: define i1 @neg_trunc1_ptrtoint(
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; CHECK-SAME: ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr [[PTR]], align 1
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; CHECK-NEXT: [[INT:%.*]] = ptrtoint ptr [[PTR]] to i64
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[INT]] to i1
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; CHECK-NEXT: ret i1 [[TRUNC]]
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;
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%load = load i8, ptr %ptr, align 1
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%int = ptrtoint ptr %ptr to i64
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%trunc = trunc i64 %int to i1
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ret i1 %trunc
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}
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define i4 @trunc4_ptrtoint(ptr %ptr) {
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; CHECK-LABEL: define i4 @trunc4_ptrtoint(
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; CHECK-SAME: ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[PTR]], align 16
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; CHECK-NEXT: [[INT:%.*]] = ptrtoint ptr [[PTR]] to i64
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[INT]] to i4
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; CHECK-NEXT: ret i4 0
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;
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%load = load i32, ptr %ptr, align 16
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%int = ptrtoint ptr %ptr to i64
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%trunc = trunc i64 %int to i4
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ret i4 %trunc
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}
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define i1 @trunc1_ptrtoaddr(ptr %ptr) {
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; CHECK-LABEL: define i1 @trunc1_ptrtoaddr(
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; CHECK-SAME: ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[LOAD:%.*]] = load i16, ptr [[PTR]], align 2
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; CHECK-NEXT: [[INT:%.*]] = ptrtoaddr ptr [[PTR]] to i64
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[INT]] to i1
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; CHECK-NEXT: ret i1 false
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;
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%load = load i16, ptr %ptr, align 2
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%int = ptrtoaddr ptr %ptr to i64
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%trunc = trunc i64 %int to i1
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ret i1 %trunc
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}
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