c23b4fbdbb
Now that #149310 has restricted lifetime intrinsics to only work on allocas, we can also drop the explicit size argument. Instead, the size is implied by the alloca. This removes the ability to only mark a prefix of an alloca alive/dead. We never used that capability, so we should remove the need to handle that possibility everywhere (though many key places, including stack coloring, did not actually respect this).
171 lines
6.3 KiB
LLVM
171 lines
6.3 KiB
LLVM
; RUN: opt -mtriple=hexagon -passes=loop-vectorize -hexagon-autohvx -debug-only=loop-vectorize -disable-output < %s 2>&1 | FileCheck %s
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; REQUIRES: asserts
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; Check that TTI::getMinimumVF works. The calculated MaxVF was based on the
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; register pressure and was less than 64.
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; CHECK: LV: Overriding calculated MaxVF({{[0-9]+}}) with target's minimum: 64
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target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
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%s.0 = type { ptr, i32, i32, i32, i32 }
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@g0 = external dso_local local_unnamed_addr global ptr, align 4
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declare void @llvm.lifetime.start.p0(ptr nocapture) #0
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declare void @llvm.lifetime.end.p0(ptr nocapture) #0
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; Function Attrs: nounwind
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define hidden fastcc void @f0(ptr nocapture %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i8 zeroext %a5) unnamed_addr #1 {
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b0:
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%v0 = alloca [4 x [9 x i16]], align 8
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call void @llvm.lifetime.start.p0(ptr nonnull %v0) #2
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%v2 = add i32 %a1, -2
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%v3 = add i32 %a3, -9
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%v4 = icmp ugt i32 %v2, %v3
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%v5 = add i32 %a2, -2
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%v6 = add i32 %a4, -9
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%v7 = icmp ugt i32 %v5, %v6
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%v8 = or i1 %v4, %v7
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%v9 = load ptr, ptr @g0, align 4, !tbaa !1
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%v10 = zext i8 %a5 to i32
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%v11 = getelementptr inbounds ptr, ptr %v9, i32 %v10
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%v12 = load ptr, ptr %v11, align 4, !tbaa !1
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%v14 = load ptr, ptr %v12, align 4, !tbaa !5
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br i1 %v8, label %b1, label %b2
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b1: ; preds = %b1, %b0
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%v15 = phi i32 [ 0, %b0 ], [ %v119, %b1 ]
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%v16 = add i32 %v5, %v15
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%v17 = icmp slt i32 %v16, 0
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%v18 = icmp slt i32 %v16, %a4
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%v19 = select i1 %v18, i32 %v16, i32 %v3
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%v20 = select i1 %v17, i32 0, i32 %v19
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%v21 = mul i32 %v20, %a3
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%v22 = add i32 97, %v21
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%v23 = getelementptr inbounds i8, ptr %v14, i32 %v22
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%v24 = load i8, ptr %v23, align 1, !tbaa !8
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%v25 = zext i8 %v24 to i32
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%v26 = add i32 101, %v21
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%v27 = getelementptr inbounds i8, ptr %v14, i32 %v26
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%v28 = load i8, ptr %v27, align 1, !tbaa !8
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%v29 = zext i8 %v28 to i32
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%v30 = mul nsw i32 %v29, -5
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%v31 = add nsw i32 %v30, %v25
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%v32 = add i32 106, %v21
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%v33 = getelementptr inbounds i8, ptr %v14, i32 %v32
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%v34 = load i8, ptr %v33, align 1, !tbaa !8
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%v35 = zext i8 %v34 to i32
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%v36 = mul nuw nsw i32 %v35, 20
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%v37 = add nsw i32 %v36, %v31
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%v38 = add i32 111, %v21
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%v39 = getelementptr inbounds i8, ptr %v14, i32 %v38
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%v40 = load i8, ptr %v39, align 1, !tbaa !8
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%v41 = zext i8 %v40 to i32
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%v42 = mul nuw nsw i32 %v41, 20
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%v43 = add nsw i32 %v42, %v37
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%v44 = add i32 116, %v21
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%v45 = getelementptr inbounds i8, ptr %v14, i32 %v44
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%v46 = load i8, ptr %v45, align 1, !tbaa !8
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%v47 = zext i8 %v46 to i32
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%v48 = mul nsw i32 %v47, -5
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%v49 = add nsw i32 %v48, %v43
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%v50 = add i32 120, %v21
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%v51 = getelementptr inbounds i8, ptr %v14, i32 %v50
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%v52 = load i8, ptr %v51, align 1, !tbaa !8
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%v53 = zext i8 %v52 to i32
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%v54 = add nsw i32 %v49, %v53
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%v55 = trunc i32 %v54 to i16
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%v56 = getelementptr inbounds [4 x [9 x i16]], ptr %v0, i32 0, i32 0, i32 %v15
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store i16 %v55, ptr %v56, align 2, !tbaa !9
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%v57 = mul nsw i32 %v35, -5
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%v58 = add nsw i32 %v57, %v29
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%v59 = add nsw i32 %v42, %v58
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%v60 = mul nuw nsw i32 %v47, 20
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%v61 = add nsw i32 %v60, %v59
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%v62 = mul nsw i32 %v53, -5
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%v63 = add nsw i32 %v62, %v61
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%v64 = add i32 125, %v21
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%v65 = getelementptr inbounds i8, ptr %v14, i32 %v64
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%v66 = load i8, ptr %v65, align 1, !tbaa !8
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%v67 = zext i8 %v66 to i32
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%v68 = add nsw i32 %v63, %v67
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%v69 = trunc i32 %v68 to i16
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%v70 = getelementptr inbounds [4 x [9 x i16]], ptr %v0, i32 0, i32 1, i32 %v15
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store i16 %v69, ptr %v70, align 2, !tbaa !9
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%v71 = mul nsw i32 %v41, -5
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%v72 = add nsw i32 %v71, %v35
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%v73 = add nsw i32 %v60, %v72
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%v74 = mul nuw nsw i32 %v53, 20
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%v75 = add nsw i32 %v74, %v73
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%v76 = mul nsw i32 %v67, -5
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%v77 = add nsw i32 %v76, %v75
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%v78 = add i32 130, %v21
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%v79 = getelementptr inbounds i8, ptr %v14, i32 %v78
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%v80 = load i8, ptr %v79, align 1, !tbaa !8
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%v81 = zext i8 %v80 to i32
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%v82 = add nsw i32 %v77, %v81
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%v83 = trunc i32 %v82 to i16
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%v84 = getelementptr inbounds [4 x [9 x i16]], ptr %v0, i32 0, i32 2, i32 %v15
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store i16 %v83, ptr %v84, align 2, !tbaa !9
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%v85 = add i32 92, %v21
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%v86 = getelementptr inbounds i8, ptr %v14, i32 %v85
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%v87 = load i8, ptr %v86, align 1, !tbaa !8
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%v88 = zext i8 %v87 to i16
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%v89 = add i32 135, %v21
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%v90 = getelementptr inbounds i8, ptr %v14, i32 %v89
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%v91 = load i8, ptr %v90, align 1, !tbaa !8
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%v92 = zext i8 %v91 to i16
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%v93 = mul nsw i16 %v92, -5
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%v94 = add nsw i16 %v93, %v88
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%v95 = add i32 140, %v21
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%v96 = getelementptr inbounds i8, ptr %v14, i32 %v95
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%v97 = load i8, ptr %v96, align 1, !tbaa !8
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%v98 = zext i8 %v97 to i16
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%v99 = mul nuw nsw i16 %v98, 20
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%v100 = add nsw i16 %v99, %v94
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%v101 = add i32 145, %v21
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%v102 = getelementptr inbounds i8, ptr %v14, i32 %v101
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%v103 = load i8, ptr %v102, align 1, !tbaa !8
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%v104 = zext i8 %v103 to i16
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%v105 = mul nuw nsw i16 %v104, 20
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%v106 = add i16 %v105, %v100
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%v107 = add i32 150, %v21
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%v108 = getelementptr inbounds i8, ptr %v14, i32 %v107
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%v109 = load i8, ptr %v108, align 1, !tbaa !8
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%v110 = zext i8 %v109 to i16
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%v111 = mul nsw i16 %v110, -5
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%v112 = add i16 %v111, %v106
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%v113 = add i32 154, %v21
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%v114 = getelementptr inbounds i8, ptr %v14, i32 %v113
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%v115 = load i8, ptr %v114, align 1, !tbaa !8
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%v116 = zext i8 %v115 to i16
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%v117 = add i16 %v112, %v116
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%v118 = getelementptr inbounds [4 x [9 x i16]], ptr %v0, i32 0, i32 3, i32 %v15
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store i16 %v117, ptr %v118, align 2, !tbaa !9
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%v119 = add nuw nsw i32 %v15, 1
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%v120 = icmp eq i32 %v119, 19
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br i1 %v120, label %b2, label %b1
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b2: ; preds = %b1, %b0
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call void @llvm.lifetime.end.p0(ptr nonnull %v0) #2
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ret void
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}
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attributes #0 = { argmemonly nounwind }
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attributes #1 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" }
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attributes #2 = { nounwind }
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!llvm.module.flags = !{!0}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{!2, !2, i64 0}
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!2 = !{!"any pointer", !3, i64 0}
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!3 = !{!"omnipotent char", !4, i64 0}
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!4 = !{!"Simple C/C++ TBAA"}
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!5 = !{!6, !2, i64 0}
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!6 = !{!"", !2, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16}
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!7 = !{!"int", !3, i64 0}
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!8 = !{!3, !3, i64 0}
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!9 = !{!10, !10, i64 0}
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!10 = !{!"short", !3, i64 0}
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