shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/mlir/test/Conversion
History
Rob Suderman c5fef77bc3 [mlir] Add CtPop to MathOps with lowering to LLVM 
math.ctpop maths to the llvm.ctpop intrinsic.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D114998
2021-12-06 11:54:20 -08:00
..
AffineToStandard
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
ArithmeticToLLVM
[mlir:DialectConversion] Restructure how argument/target materializations get invoked
2021-10-27 02:09:04 +00:00
ArithmeticToSPIRV
[mlir][spirv] arith::RemSIOp OpenCL lowering
2021-11-25 12:44:06 +03:00
AsyncToLLVM
[MLIR][LLVM] Permit integer types in switch other than i32
2021-11-16 12:00:37 -05:00
BufferizationToMemRef
[mlir] Decompose Bufferization Clone operation into Memref Alloc and Copy.
2021-11-30 10:15:56 +01:00
ComplexToLLVM
[mlir:DialectConversion] Restructure how argument/target materializations get invoked
2021-10-27 02:09:04 +00:00
ComplexToStandard
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
GPUCommon
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
GPUToCUDA
[mlir] Change test-gpu-to-cubin to derive from SerializeToBlobPass
2021-03-11 10:42:20 +01:00
GPUToNVVM
[mlir][gpu] Extend shuffle op modes and add nvvm lowering
2021-11-19 11:14:31 -08:00
GPUToROCDL
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
GPUToROCm
[mlir] Remove mlir-rocm-runner
2021-03-19 00:24:10 -07:00
GPUToSPIRV
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
GPUToVulkan
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
LinalgToSPIRV
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
LinalgToVector
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
MathToLibm
[mlir] Support multi-dimensional vectors in MathToLibm conversion.
2021-11-16 11:13:52 +01:00
MathToLLVM
[mlir] Add CtPop to MathOps with lowering to LLVM
2021-12-06 11:54:20 -08:00
MathToSPIRV
[mlir][spirv] arith::RemSIOp OpenCL lowering
2021-11-25 12:44:06 +03:00
MemRefToLLVM
[mlir:DialectConversion] Restructure how argument/target materializations get invoked
2021-10-27 02:09:04 +00:00
MemRefToSPIRV
[mlir:DialectConversion] Restructure how argument/target materializations get invoked
2021-10-27 02:09:04 +00:00
OpenACCToLLVM
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
OpenACCToSCF
[mlir][openacc] Add conversion for if operand to scf.if for standalone data operation
2021-06-07 12:10:03 -04:00
OpenMPToLLVM
[mlir:DialectConversion] Restructure how argument/target materializations get invoked
2021-10-27 02:09:04 +00:00
PDLToPDLInterp
Multi-root PDL matching using upward traversals.
2021-11-26 18:11:37 +05:30
SCFToGPU
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
SCFToOpenMP
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
SCFToSPIRV
[mlir] spirv: Add scf.while spirv conversion
2021-11-16 13:19:34 +03:00
SCFToStandard
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
ShapeToStandard
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
SPIRVToLLVM
[mlir][SPIRVToLLVM] Add shufflevector conversion
2021-11-01 23:05:37 +08:00
StandardToLLVM
[mlir] Avoid needlessly converting LLVM named structs with compatible elements
2021-12-06 13:42:11 +01:00
StandardToSPIRV
[mlir][spirv] Add math to OpenCL conversion
2021-11-24 02:31:21 +03:00
TosaToLinalg
[mlir][tensor] InsertSliceOp verification.
2021-11-30 20:37:06 +00:00
TosaToSCF
[MLIR][TOSA] Resubmit Tosa to Standard/SCF Lowerings (const, if, while)"
2021-02-26 17:44:12 -08:00
TosaToStandard
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
VectorToGPU
[mlir][VectorToGPU] Support more cases in conversion to MMA ops
2021-11-11 13:10:38 -08:00
VectorToLLVM
[mlir][Vector] Support 0-D vectors in ConstantMaskOp
2021-12-06 08:03:04 +00:00
VectorToROCDL
[MLIR] Replace std ops with arith dialect ops
2021-10-13 03:07:03 +00:00
VectorToSCF
[mlir][Vector] Thread 0-d vectors through vector.transfer ops
2021-12-01 16:49:43 +00:00
VectorToSPIRV
[mlir][vector] Insert/extract element can accept index
2021-11-18 22:40:29 +00:00