2d4a8dadba
In preparation to strip VPUnrollPartAccessor and unroll recipes directly, strip unnecessary complication in getGEPIndexTy, as the unroll part will no longer be available in follow-ups (see #168886 for instance). The patch also helps by doing a mass test update up-front. Narrowing the GEP index type conditionally does not yield any benefit, and the change is non-functional in terms of emitted assembly. While at it, avoid hard-coding address-space 0, and use the pointer operand's address space to get the GEP index type.
59 lines
3.3 KiB
LLVM
59 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "^scalar.ph" --version 6
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; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=4 -S %s | FileCheck %s
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target datalayout = "p1:16:16"
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define void @vector_pointer_gep_idxty_addrspace(ptr addrspace(1) noalias %a, ptr addrspace(1) noalias %b) {
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; CHECK-LABEL: define void @vector_pointer_gep_idxty_addrspace(
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; CHECK-SAME: ptr addrspace(1) noalias [[A:%.*]], ptr addrspace(1) noalias [[B:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[B]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[TMP0]], i16 2
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[TMP0]], i16 4
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[TMP0]], i16 6
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr addrspace(1) [[TMP0]], align 4
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; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x i32>, ptr addrspace(1) [[TMP1]], align 4
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; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <2 x i32>, ptr addrspace(1) [[TMP2]], align 4
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; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <2 x i32>, ptr addrspace(1) [[TMP3]], align 4
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; CHECK-NEXT: [[TMP4:%.*]] = add <2 x i32> [[WIDE_LOAD]], splat (i32 1)
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; CHECK-NEXT: [[TMP5:%.*]] = add <2 x i32> [[WIDE_LOAD1]], splat (i32 1)
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; CHECK-NEXT: [[TMP6:%.*]] = add <2 x i32> [[WIDE_LOAD2]], splat (i32 1)
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; CHECK-NEXT: [[TMP7:%.*]] = add <2 x i32> [[WIDE_LOAD3]], splat (i32 1)
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; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[A]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[TMP8]], i16 2
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; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[TMP8]], i16 4
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; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[TMP8]], i16 6
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; CHECK-NEXT: store <2 x i32> [[TMP4]], ptr addrspace(1) [[TMP8]], align 4
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; CHECK-NEXT: store <2 x i32> [[TMP5]], ptr addrspace(1) [[TMP9]], align 4
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; CHECK-NEXT: store <2 x i32> [[TMP6]], ptr addrspace(1) [[TMP10]], align 4
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; CHECK-NEXT: store <2 x i32> [[TMP7]], ptr addrspace(1) [[TMP11]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
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; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
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; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br label %[[SCALAR_PH:.*]]
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; CHECK: [[SCALAR_PH]]:
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep.b.iv = getelementptr inbounds i32, ptr addrspace(1) %b, i64 %iv
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%ld.b = load i32, ptr addrspace(1) %gep.b.iv
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%add = add i32 %ld.b, 1
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%gep.a.iv = getelementptr inbounds i32, ptr addrspace(1) %a, i64 %iv
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store i32 %add, ptr addrspace(1) %gep.a.iv
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv, 1024
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br i1 %exitcond, label %end, label %loop
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end:
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ret void
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}
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