llvm-project/llvm/test/Transforms/MergeICmps/X86/entry-block-shuffled.ll
Mingjie Xu fac9472593
[IR] Reland Optimize PHINode::removeIncomingValue() and PHINode::removeIncomingValueIf() to use the swapping strategy. (#174274)
Reland #171963, #172639 and #173444, they are reverted in
86b9f90b9574b3a7d15d28a91f6316459dcfa046 because of introducing
non-determinism in compiles.
The non-determinism has been fixed in
9b8addffa70cee5b2acc5454712d9cf78ce45710.
2026-01-04 09:24:53 +08:00

83 lines
3.7 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals
; RUN: opt < %s -passes=mergeicmps -verify-dom-info -mtriple=x86_64-unknown-unknown -S | FileCheck %s
%S = type { i32, i32, i32, i32 }
; The entry block is part of the chain. It however can not be merged. We need to
; make sure that the control flow is still consistent (goes through each of the
; blocks).
define zeroext i1 @opeq1(
; CHECK-LABEL: @opeq1(
; CHECK-NEXT: entry2:
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[S:%.*]], ptr [[A:%.*]], i64 0, i32 3
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[S]], ptr [[B:%.*]], i64 0, i32 2
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]]
; CHECK-NEXT: br i1 [[TMP4]], label %"land.rhs.i+land.rhs.i.2", label [[OPEQ1_EXIT:%.*]], !prof [[PROF1:![0-9]+]]
; CHECK: "land.rhs.i+land.rhs.i.2":
; CHECK-NEXT: [[MEMCMP:%.*]] = call i32 @memcmp(ptr [[A]], ptr [[B]], i64 8)
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[MEMCMP]], 0
; CHECK-NEXT: br i1 [[TMP5]], label [[LAND_RHS_I_31:%.*]], label [[OPEQ1_EXIT]], !prof [[PROF2:![0-9]+]]
; CHECK: land.rhs.i.31:
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[S]], ptr [[A]], i64 0, i32 3
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[S]], ptr [[B]], i64 0, i32 3
; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP6]], align 4
; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP7]], align 4
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP8]], [[TMP9]]
; CHECK-NEXT: br label [[OPEQ1_EXIT]]
; CHECK: opeq1.exit:
; CHECK-NEXT: [[TMP11:%.*]] = phi i1 [ false, [[ENTRY2:%.*]] ], [ false, %"land.rhs.i+land.rhs.i.2" ], [ [[TMP10]], [[LAND_RHS_I_31]] ]
; CHECK-NEXT: ret i1 [[TMP11]]
;
ptr nocapture readonly dereferenceable(16) %a,
ptr nocapture readonly dereferenceable(16) %b) local_unnamed_addr nofree nosync !prof !0 {
entry:
%first.i = getelementptr inbounds %S, ptr %a, i64 0, i32 3
%0 = load i32, ptr %first.i, align 4
%first1.i = getelementptr inbounds %S, ptr %b, i64 0, i32 2
%1 = load i32, ptr %first1.i, align 4
%cmp.i = icmp eq i32 %0, %1
br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit, !prof !1
land.rhs.i:
%2 = load i32, ptr %a, align 4
%3 = load i32, ptr %b, align 4
%cmp3.i = icmp eq i32 %2, %3
br i1 %cmp3.i, label %land.rhs.i.2, label %opeq1.exit, !prof !2
land.rhs.i.2:
%third.i = getelementptr inbounds %S, ptr %a, i64 0, i32 1
%4 = load i32, ptr %third.i, align 4
%third2.i = getelementptr inbounds %S, ptr %b, i64 0, i32 1
%5 = load i32, ptr %third2.i, align 4
%cmp4.i = icmp eq i32 %4, %5
br i1 %cmp4.i, label %land.rhs.i.3, label %opeq1.exit, !prof !3
land.rhs.i.3:
%fourth.i = getelementptr inbounds %S, ptr %a, i64 0, i32 3
%6 = load i32, ptr %fourth.i, align 4
%fourth2.i = getelementptr inbounds %S, ptr %b, i64 0, i32 3
%7 = load i32, ptr %fourth2.i, align 4
%cmp5.i = icmp eq i32 %6, %7
br label %opeq1.exit
opeq1.exit:
%8 = phi i1 [ false, %entry ], [ false, %land.rhs.i], [ false, %land.rhs.i.2 ], [ %cmp5.i, %land.rhs.i.3 ]
ret i1 %8
}
!0 = !{!"function_entry_count", i32 10}
!1 = !{!"branch_weights", i32 2, i32 3}
!2 = !{!"branch_weights", i32 5, i32 7}
!3 = !{!"branch_weights", i32 11, i32 13}
;.
; CHECK: attributes #[[ATTR0:[0-9]+]] = { nofree nosync }
; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: read) }
;.
; CHECK: [[META0:![0-9]+]] = !{!"function_entry_count", i32 10}
; CHECK: [[PROF1]] = !{!"branch_weights", i32 2, i32 3}
; CHECK: [[PROF2]] = !{!"branch_weights", i32 55, i32 233}
;.