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llvm-project/llvm/lib/Target/AMDGPU
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Tom Stellard d585cd85a3 AMDGPU/SI: Add a helper for creating aliases for the _e32 instructions 
Summary:
We are currently only using these aliases for VOPC instructions,
but this helper will make it easier to use them everywhere.

These aliases allow for the automatic matching of instructions
with forced 32-bit encoding.  Eventually, we should be able to remove
the custom C++ logic we have for this in the assembler.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D13396

llvm-svn: 249330
2015-10-05 17:57:39 +00:00
..
AsmParser
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
InstPrinter
Untabify.
2015-09-22 11:15:07 +00:00
MCTargetDesc
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
TargetInfo
…
Utils
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
AMDGPU.h
AMDGPU: Add pass to lower OpenCL image and sampler arguments.
2015-08-07 23:19:30 +00:00
AMDGPU.td
AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
2015-07-16 19:40:07 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPU: Minor cleanups to always inline pass
2015-07-13 19:08:36 +00:00
AMDGPUAsmPrinter.cpp
AMDGPU: Merge if and switch
2015-10-01 21:51:59 +00:00
AMDGPUAsmPrinter.h
AMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart()
2015-06-26 21:14:58 +00:00
AMDGPUCallingConv.td
…
AMDGPUFrameLowering.cpp
Remove redundant TargetFrameLowering::getFrameIndexOffset virtual
2015-08-15 02:32:35 +00:00
AMDGPUFrameLowering.h
Remove redundant TargetFrameLowering::getFrameIndexOffset virtual
2015-08-15 02:32:35 +00:00
AMDGPUHSATargetObjectFile.cpp
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
AMDGPUHSATargetObjectFile.h
AMDGPU: address -Winconsistent-missing-override
2015-09-26 04:34:52 +00:00
AMDGPUInstrInfo.cpp
Remove redundant TargetFrameLowering::getFrameIndexOffset virtual
2015-08-15 02:32:35 +00:00
AMDGPUInstrInfo.h
AMDGPU: Make getNamedOperandIdx declaration readonly
2015-09-25 18:09:15 +00:00
AMDGPUInstrInfo.td
…
AMDGPUInstructions.td
…
AMDGPUIntrinsicInfo.cpp
…
AMDGPUIntrinsicInfo.h
…
AMDGPUIntrinsics.td
…
AMDGPUISelDAGToDAG.cpp
AMDGPU: Handle i64->v2i32 loads/stores in PreprocessISelDAG
2015-09-25 17:27:08 +00:00
AMDGPUISelLowering.cpp
propagate fast-math-flags on DAG nodes
2015-09-16 16:31:21 +00:00
AMDGPUISelLowering.h
AMDGPU: Produce error on dynamic_stackalloc
2015-08-26 18:37:13 +00:00
AMDGPUMachineFunction.cpp
…
AMDGPUMachineFunction.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
AMDGPUMCInstLower.cpp
Remove and forbid raw_svector_ostream::flush() calls.
2015-08-13 18:12:56 +00:00
AMDGPUMCInstLower.h
…
AMDGPUOpenCLImageTypeLoweringPass.cpp
AMDGPU/SI: Remove assert from AMDGPUOpenCLImageTypeLowering pass
2015-10-01 21:16:05 +00:00
AMDGPUPromoteAlloca.cpp
AMDGPU: Produce error on dynamic_stackalloc
2015-08-26 18:37:13 +00:00
AMDGPURegisterInfo.cpp
…
AMDGPURegisterInfo.h
AMDGPU: Remove dead code
2015-09-19 06:41:10 +00:00
AMDGPURegisterInfo.td
AMDGPU: Set SubRegIndex size and offset
2015-07-30 17:03:11 +00:00
AMDGPUSubtarget.cpp
Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.
2015-09-15 16:17:27 +00:00
AMDGPUSubtarget.h
AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
2015-07-16 19:40:07 +00:00
AMDGPUTargetMachine.cpp
AMDGPU: Move SIFixSGPRLiveRanges to be a regalloc pass
2015-10-01 22:10:03 +00:00
AMDGPUTargetMachine.h
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
AMDGPUTargetTransformInfo.cpp
…
AMDGPUTargetTransformInfo.h
Make TargetTransformInfo keeping a reference to the Module DataLayout
2015-07-09 02:08:42 +00:00
AMDILCFGStructurizer.cpp
AMDGPU: Remove dead code
2015-09-19 06:41:10 +00:00
AMDKernelCodeT.h
AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
2015-06-26 21:58:31 +00:00
CaymanInstructions.td
AMDGPU: Add MEM_RAT STORE_TYPED.
2015-10-01 17:51:34 +00:00
CIInstructions.td
AMDGPU: Add s_dcache_* instructions
2015-09-24 19:52:27 +00:00
CMakeLists.txt
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
EvergreenInstructions.td
AMDGPU: Add MEM_RAT STORE_TYPED.
2015-10-01 17:51:34 +00:00
LLVMBuild.txt
AMDGPU/SI: Add hsa code object directives
2015-06-26 21:15:07 +00:00
Makefile
AMDGPU/SI: Add hsa code object directives
2015-06-26 21:15:07 +00:00
Processors.td
AMDGPU/SI: Add Fiji support
2015-08-06 19:43:02 +00:00
R600ClauseMergePass.cpp
…
R600ControlFlowFinalizer.cpp
…
R600Defines.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
…
R600InstrFormats.td
…
R600InstrInfo.cpp
Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC.
2015-09-10 23:10:42 +00:00
R600InstrInfo.h
Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC.
2015-09-10 23:10:42 +00:00
R600Instructions.td
Fix typos.
2015-09-12 01:17:08 +00:00
R600Intrinsics.td
…
R600ISelLowering.cpp
AMDGPU: Add MEM_RAT STORE_TYPED.
2015-10-01 17:51:34 +00:00
R600ISelLowering.h
Make TargetLowering::getPointerTy() taking DataLayout as an argument
2015-07-09 02:09:04 +00:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600OptimizeVectorRegisters.cpp
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600Packetizer.cpp
…
R600RegisterInfo.cpp
…
R600RegisterInfo.h
AMDGPU: Remove dead code
2015-09-19 06:41:10 +00:00
R600RegisterInfo.td
…
R600Schedule.td
…
R600TextureIntrinsicsReplacer.cpp
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[PM/AA] Remove all of the dead AliasAnalysis pointers being threaded
2015-07-22 09:52:54 +00:00
SIDefines.h
AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
2015-06-26 21:58:31 +00:00
SIFixControlFlowLiveIntervals.cpp
AMDGPU: Remove unused includes
2015-09-25 00:28:43 +00:00
SIFixSGPRCopies.cpp
AMDGPU: Remove dead code
2015-10-01 21:51:57 +00:00
SIFixSGPRLiveRanges.cpp
AMDGPU: Move SIFixSGPRLiveRanges to be a regalloc pass
2015-10-01 22:10:03 +00:00
SIFoldOperands.cpp
Improved the interface of methods commuting operands, improved X86-FMA3 mem-folding&coalescing.
2015-09-28 20:33:22 +00:00
SIInsertWaits.cpp
AMDGPU: Fix unused variable warning in release build
2015-10-01 22:40:35 +00:00
SIInstrFormats.td
AMDGPU: Remove hasPostISelHook from most instructions
2015-09-26 05:06:48 +00:00
SIInstrInfo.cpp
AMDGPU/SI: Add verifier check for exec reads
2015-10-02 18:58:37 +00:00
SIInstrInfo.h
AMDGPU/SI: Don't set DATA_FORMAT if ADD_TID_ENABLE is set
2015-09-29 23:37:32 +00:00
SIInstrInfo.td
AMDGPU/SI: Add a helper for creating aliases for the _e32 instructions
2015-10-05 17:57:39 +00:00
SIInstructions.td
AMDGPU/SI: Add verifier check for exec reads
2015-10-02 18:58:37 +00:00
SIIntrinsics.td
…
SIISelLowering.cpp
AMDGPU/SI: Don't set DATA_FORMAT if ADD_TID_ENABLE is set
2015-09-29 23:37:32 +00:00
SIISelLowering.h
AMDGPU: Assume SMRD access for constant address space
2015-08-07 20:18:34 +00:00
SILoadStoreOptimizer.cpp
AMDGPU/SI: Fix read2 merging into a super register.
2015-07-14 17:57:36 +00:00
SILowerControlFlow.cpp
AMDGPU: Fix recomputing dominator tree unnecessarily
2015-09-25 17:21:28 +00:00
SILowerI1Copies.cpp
AMDGPU: Fix recomputing dominator tree unnecessarily
2015-09-25 17:21:28 +00:00
SIMachineFunctionInfo.cpp
MachineRegisterInfo: Remove UsedPhysReg infrastructure
2015-07-14 17:52:07 +00:00
SIMachineFunctionInfo.h
…
SIPrepareScratchRegs.cpp
AMDGPU/SI: Don't set DATA_FORMAT if ADD_TID_ENABLE is set
2015-09-29 23:37:32 +00:00
SIRegisterInfo.cpp
AMDGPU: Make SIInsertWaits about a factor of 4 faster
2015-10-01 21:43:15 +00:00
SIRegisterInfo.h
AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order
2015-10-01 02:02:46 +00:00
SIRegisterInfo.td
AMDGPU: Set CopyCost of register classes
2015-09-26 04:09:34 +00:00
SISchedule.td
AMDGPU: Improve accuracy of instruction rates for VOPC
2015-09-25 16:58:25 +00:00
SIShrinkInstructions.cpp
AMDGPU: Simplify debug printing
2015-09-10 21:51:19 +00:00
SITypeRewriter.cpp
…
VIInstrFormats.td
…
VIInstructions.td
AMDGPU: Add s_dcache_* instructions
2015-09-24 19:52:27 +00:00