Aaditya fbd2467796

[AMDGPU] DPP implementations for Wave Reduction (#185814) ...

Adding DPP reduction support for i32 types.
Supported Ops: `umin`, `min`, `umax`, `max`,
`add`, `sub`, `and`, `or`, `xor`.

2026-03-18 13:11:53 +05:30

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AArch64

[NewPM] Port for AArch64ConditionOptimizer (#186941)

2026-03-17 16:50:37 +00:00

AMDGPU

[AMDGPU] DPP implementations for Wave Reduction (#185814)

2026-03-18 13:11:53 +05:30

ARC

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ARM

[ARM] Try to lower sign bit SELECT_CC to shift (#186349)

2026-03-16 09:32:43 +01:00

AVR

[AVR] Improve expansion of pseudo instruction SPREAD (#186780)

2026-03-16 21:24:20 +01:00

BPF

[BPF] Use ".L" local prefix label for basic blocks (#95103)

2026-03-15 19:28:00 +01:00

CSKY

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DirectX

[DirectX] Fix assertion in PointerTypeAnalysis with empty global_ctors (#179034)

2026-03-17 12:06:07 -07:00

Generic

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Hexagon

[Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (#183669)

2026-03-10 09:16:46 -05:00

Inputs

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Lanai

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LoongArch

[CodeGenPrepare][NFC] Get BPI/BFI from pass/analysis manager (#186651)

2026-03-15 17:41:22 +01:00

M68k

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Mips

[LLVM] Remove "no-nans-fp-math" attribute support (#186285)

2026-03-13 09:29:28 +00:00

MIR

[MIR] Support symbolic INLINEASM extra-info flags (#186818)

2026-03-17 11:08:28 +00:00

MIR2Vec

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MLRegAlloc

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MSP430

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NVPTX

[NVPTX][AutoUpgrade] atom.load intrinsics should be autoupgraded to monotonic atomicrmw for NVPTX (#187140)

2026-03-18 01:26:47 +00:00

PowerPC

[NFC][PowerPC] Pre-commit to optimize bswap64 builtin for power8 (#181776)

2026-03-18 10:09:18 +05:30

RISCV

[RISCV] Select (sext_inreg (sra X, C), i8/i16) as slli+srai. (#186956)

2026-03-17 08:01:40 -07:00

SPARC

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SPIRV

[SPIR-V] Add support for arbitrary precision integer constants in instruction printer (#185306)

2026-03-17 15:42:21 +01:00

SystemZ

[SystemZ] Add missing REQUIRES: asserts

2026-03-11 10:03:01 +01:00

Thumb

[ARM] Try to lower sign bit SELECT_CC to shift (#186349)

2026-03-16 09:32:43 +01:00

Thumb2

[ARM] Try to lower sign bit SELECT_CC to shift (#186349)

2026-03-16 09:32:43 +01:00

VE

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WebAssembly

[WebAssembly] Fold sign-extending shifts into signed loads in FastISel (#185906)

2026-03-18 10:30:00 +09:00

WinCFGuard

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WinEH

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X86

[X86] Support reserving EDI on x86-32 (#186123)

2026-03-18 11:33:08 +08:00

XCore

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Xtensa

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