97ed076dd1
Field ResourceUnitMask was incorrectly defined as a 'const unsigned' mask. It should have been a 64 bit quantity instead. That means, ResourceUnitMask was always implicitly truncated to a 32 bit quantity. This issue has been found by inspection. Surprisingly, that bug was latent, and it never negatively affected any existing upstream targets. This patch fixes the wrong definition of ResourceUnitMask, and adds a bunch of extra debug prints to help debugging potential issues related to invalid processor resource masks. llvm-svn: 350820
98 lines
2.5 KiB
C++
98 lines
2.5 KiB
C++
//===--------------------- Pipeline.cpp -------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements an ordered container of stages that simulate the
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/// pipeline of a hardware backend.
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///
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//===----------------------------------------------------------------------===//
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#include "llvm/MCA/Pipeline.h"
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#include "llvm/MCA/HWEventListener.h"
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#include "llvm/Support/Debug.h"
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namespace llvm {
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namespace mca {
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#define DEBUG_TYPE "llvm-mca"
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void Pipeline::addEventListener(HWEventListener *Listener) {
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if (Listener)
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Listeners.insert(Listener);
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for (auto &S : Stages)
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S->addListener(Listener);
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}
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bool Pipeline::hasWorkToProcess() {
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return any_of(Stages, [](const std::unique_ptr<Stage> &S) {
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return S->hasWorkToComplete();
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});
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}
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Expected<unsigned> Pipeline::run() {
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assert(!Stages.empty() && "Unexpected empty pipeline found!");
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do {
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notifyCycleBegin();
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if (Error Err = runCycle())
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return std::move(Err);
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notifyCycleEnd();
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++Cycles;
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} while (hasWorkToProcess());
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return Cycles;
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}
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Error Pipeline::runCycle() {
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Error Err = ErrorSuccess();
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// Update stages before we start processing new instructions.
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for (auto I = Stages.rbegin(), E = Stages.rend(); I != E && !Err; ++I) {
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const std::unique_ptr<Stage> &S = *I;
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Err = S->cycleStart();
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}
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// Now fetch and execute new instructions.
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InstRef IR;
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Stage &FirstStage = *Stages[0];
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while (!Err && FirstStage.isAvailable(IR))
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Err = FirstStage.execute(IR);
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// Update stages in preparation for a new cycle.
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for (auto I = Stages.rbegin(), E = Stages.rend(); I != E && !Err; ++I) {
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const std::unique_ptr<Stage> &S = *I;
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Err = S->cycleEnd();
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}
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return Err;
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}
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void Pipeline::appendStage(std::unique_ptr<Stage> S) {
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assert(S && "Invalid null stage in input!");
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if (!Stages.empty()) {
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Stage *Last = Stages.back().get();
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Last->setNextInSequence(S.get());
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}
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Stages.push_back(std::move(S));
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}
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void Pipeline::notifyCycleBegin() {
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LLVM_DEBUG(dbgs() << "\n[E] Cycle begin: " << Cycles << '\n');
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for (HWEventListener *Listener : Listeners)
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Listener->onCycleBegin();
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}
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void Pipeline::notifyCycleEnd() {
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LLVM_DEBUG(dbgs() << "[E] Cycle end: " << Cycles << "\n");
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for (HWEventListener *Listener : Listeners)
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Listener->onCycleEnd();
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}
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} // namespace mca.
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} // namespace llvm
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