Matt Arsenault fc0f1fc695

ARM: Move remaining half convert libcall config into tablegen (#153408) ...

The __truncdfhf2 handling is kind of convoluted, but reproduces
the existing, likely wrong, handling.

2025-09-11 12:11:46 +09:00

..

AArch64

Revert "[DAGCombiner] Relax condition for extract_vector_elt combine" (#157953)

2025-09-10 21:33:44 +00:00

AMDGPU

[AMDGPU] NFC. Add testcase to test SIInsertWaitcnts::generateWaitcntInstBefore (#157938)

2025-09-10 16:39:02 -04:00

ARC

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ARM

ARM: Move remaining half convert libcall config into tablegen (#153408)

2025-09-11 12:11:46 +09:00

AVR

[Test] Add and update tests for lrint/llrint (NFC) (#152662)

2025-08-12 09:56:51 +09:00

BPF

[IR] Remove size argument from lifetime intrinsics (#150248)

2025-08-08 11:09:34 +02:00

CSKY

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DirectX

[DirectX] Validate if Textures/TypedBuffers are being bound in Root Signatures (#147573)

2025-09-10 19:49:34 -04:00

Generic

[NVPTX] Allow more argument integer types, such as i256 and i96 (#154824)

2025-08-21 13:54:38 -07:00

Hexagon

support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)

2025-09-02 09:33:28 -04:00

Inputs

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Lanai

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LoongArch

[LoongArch] Use xvperm.w for cross-lane access within a single vector (#151634)

2025-09-04 10:32:52 +08:00

M68k

[M68k] Fix reverse BTST condition causing opposite failure/success logic (#153086)

2025-08-20 13:45:01 -07:00

Mips

Reland "[NVPTX] Legalize aext-load to zext-load to expose more DAG combines" (#155063)

2025-08-25 09:15:44 -07:00

MIR

[AMDGPU] Remove most uses of /dev/null in tests (#156630)

2025-09-03 16:39:29 +01:00

MLRegAlloc

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MSP430

MSP430: Add test for llvm.sincos intrinsic (#148602)

2025-08-28 07:39:55 +09:00

NVPTX

[NVPTX] Add sm_88 and sm_110* arch support (#156857)

2025-09-05 14:08:48 +05:30

PowerPC

[PowerPC] Extend and update the test for half support (NFC) (#152625)

2025-09-10 09:03:29 +00:00

RISCV

[RISCV][GlobalIsel] Lower G_FMINIMUMNUM, G_FMAXIMUMNUM (#157295)

2025-09-11 10:16:42 +08:00

SPARC

[SPARC] Change half to use soft promotion rather than PromoteFloat (#152727)

2025-08-18 20:56:24 +02:00

SPIRV

[HLSL][NFC] Change line endings to LF (#156930)

2025-09-04 14:19:23 -07:00

SystemZ

s390x: optimize 128-bit fshl and fshr by high values (#154919)

2025-08-27 09:31:49 +02:00

Thumb

[clang][driver][arm][macho] Default to -mframe-pointer=non-leaf. (#154216)

2025-09-09 18:39:26 +00:00

Thumb2

Revert "[DAGCombiner] Relax condition for extract_vector_elt combine" (#157953)

2025-09-10 21:33:44 +00:00

VE

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

WebAssembly

Revert "[DAGCombiner] Relax condition for extract_vector_elt combine" (#157953)

2025-09-10 21:33:44 +00:00

WinCFGuard

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WinEH

Fix Windows EH IP2State tables (remove +1 bias) (#144745)

2025-07-22 09:18:13 -07:00

X86

Revert "[DAGCombiner] Relax condition for extract_vector_elt combine" (#157953)

2025-09-10 21:33:44 +00:00

XCore

XCore: Fix broken check lines in test

2025-08-04 08:40:48 +09:00

Xtensa

[Xtensa] Fix lowering FP compare operations. (#156740)

2025-09-08 20:42:52 +03:00