eb7d16ea25
mflr is kind of expensive on Power version smaller than 10, so we should schedule the store for the mflr's def away from mflr. In epilogue, the expensive mtlr has no user for its def, so it doesn't matter that the load and the mtlr are back-to-back. Reviewed By: RolandF Differential Revision: https://reviews.llvm.org/D137423
106 lines
2.8 KiB
LLVM
106 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefix=ELF64
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; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck %s -check-prefix=AIX64
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@x = global i32 1000, align 4
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define signext i32 @bar() #0 {
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; ELF64-LABEL: bar:
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; ELF64: # %bb.0: # %entry
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; ELF64-NEXT: mflr 0
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; ELF64-NEXT: stdu 1, -48(1)
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; ELF64-NEXT: std 0, 64(1)
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; ELF64-NEXT: .cfi_def_cfa_offset 48
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; ELF64-NEXT: .cfi_offset lr, 16
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; ELF64-NEXT: li 3, 0
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; ELF64-NEXT: stw 3, 44(1)
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; ELF64-NEXT: li 3, 0
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; ELF64-NEXT: stw 3, 40(1)
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; ELF64-NEXT: .LBB0_1: # %for.cond
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; ELF64-NEXT: #
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; ELF64-NEXT: lwz 3, 40(1)
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; ELF64-NEXT: addis 4, 2, .LC0@toc@ha
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; ELF64-NEXT: ld 4, .LC0@toc@l(4)
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; ELF64-NEXT: lwz 4, 0(4)
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; ELF64-NEXT: cmpw 3, 4
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; ELF64-NEXT: bge 0, .LBB0_4
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; ELF64-NEXT: # %bb.2: # %for.body
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; ELF64-NEXT: #
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; ELF64-NEXT: bl foo
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; ELF64-NEXT: nop
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; ELF64-NEXT: # %bb.3: # %for.inc
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; ELF64-NEXT: #
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; ELF64-NEXT: lwz 3, 40(1)
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; ELF64-NEXT: addi 3, 3, 1
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; ELF64-NEXT: stw 3, 40(1)
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; ELF64-NEXT: b .LBB0_1
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; ELF64-NEXT: .LBB0_4: # %for.end
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; ELF64-NEXT: li 3, 0
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; ELF64-NEXT: addi 1, 1, 48
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; ELF64-NEXT: ld 0, 16(1)
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; ELF64-NEXT: mtlr 0
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; ELF64-NEXT: blr
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;
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; AIX64-LABEL: bar:
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; AIX64: # %bb.0: # %entry
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; AIX64-NEXT: mflr 0
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; AIX64-NEXT: stdu 1, -128(1)
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; AIX64-NEXT: std 0, 144(1)
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; AIX64-NEXT: li 3, 0
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; AIX64-NEXT: stw 3, 124(1)
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; AIX64-NEXT: li 3, 0
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; AIX64-NEXT: stw 3, 120(1)
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; AIX64-NEXT: L..BB0_1: # %for.cond
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; AIX64-NEXT: #
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; AIX64-NEXT: lwz 3, 120(1)
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; AIX64-NEXT: ld 4, L..C0(2) # @x
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; AIX64-NEXT: lwz 4, 0(4)
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; AIX64-NEXT: cmpw 3, 4
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; AIX64-NEXT: bge 0, L..BB0_4
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; AIX64-NEXT: # %bb.2: # %for.body
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; AIX64-NEXT: #
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; AIX64-NEXT: bl .foo[PR]
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; AIX64-NEXT: nop
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; AIX64-NEXT: # %bb.3: # %for.inc
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; AIX64-NEXT: #
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; AIX64-NEXT: lwz 3, 120(1)
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; AIX64-NEXT: addi 3, 3, 1
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; AIX64-NEXT: stw 3, 120(1)
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; AIX64-NEXT: b L..BB0_1
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; AIX64-NEXT: L..BB0_4: # %for.end
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; AIX64-NEXT: li 3, 0
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; AIX64-NEXT: addi 1, 1, 128
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; AIX64-NEXT: ld 0, 16(1)
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; AIX64-NEXT: mtlr 0
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; AIX64-NEXT: blr
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entry:
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%retval = alloca i32, align 4
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%i = alloca i32, align 4
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store i32 0, i32* %retval, align 4
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store i32 0, i32* %i, align 4
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br label %for.cond
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for.cond:
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%0 = load i32, i32* %i, align 4
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%1 = load i32, i32* @x, align 4
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%cmp = icmp slt i32 %0, %1
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br i1 %cmp, label %for.body, label %for.end
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for.body:
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call void bitcast (void (...)* @foo to void ()*)()
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br label %for.inc
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for.inc:
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%2 = load i32, i32* %i, align 4
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%inc = add nsw i32 %2, 1
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store i32 %inc, i32* %i, align 4
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br label %for.cond
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for.end:
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ret i32 0
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}
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declare void @foo(...)
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attributes #0 = { optnone noinline }
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