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History

Reid Kleckner 08f5fd51cc [codeview] Generalize DIExpression parsing to handle load chains

Summary:
Hopefully this also clarifies exactly when and why we're rewriting
certiain S_LOCALs using reference types: We're using the reference type
to stand in for a zero-offset load.

Reviewers: inglorion

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D37309

llvm-svn: 312247

2017-08-31 15:56:49 +00:00

AArch64

Add an ID field to StackObjects

2017-07-20 21:03:45 +00:00

AMDGPU

AMDGPU: Implement memory model

2017-07-21 21:19:23 +00:00

ARM

[MIR] Print target-specific constant pools

2017-08-02 11:09:30 +00:00

Generic

[RegAllocFast] Add the proper initialize method to use the .mir infrastructure

2017-07-07 19:25:42 +00:00

Hexagon

[Hexagon] Handle Hexagon-specific machine operand target flags in MIR

2017-07-10 18:31:02 +00:00

Mips

…

NVPTX

…

PowerPC

…

X86

[codeview] Generalize DIExpression parsing to handle load chains

2017-08-31 15:56:49 +00:00

README

Add README describing the intention of test/CodeGen/MIR

2016-12-09 20:16:12 +00:00

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.