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llvm-project/llvm/lib/Target/AArch64
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Tomas Matheson fc712eb7aa [AArch64] Fix Copy Elemination for negative values 
Redundant Copy Elimination was eliminating a MOVi32imm -1 when it
determined that the value of the destination register is already -1.
However, it didn't take into account that the MOVi32imm zeroes the upper
32 bits (which are FFFFFFFF) and therefore cannot be eliminated.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D93100
2020-12-18 13:30:46 +00:00
..
AsmParser
[ARM][AAarch64] Initial command-line support for v8.7-A
2020-12-17 13:47:28 +00:00
Disassembler
[AArch64] Adding the v8.7-A LD64B/ST64B Accelerator extension
2020-12-17 13:46:23 +00:00
GISel
AArch64: use correct operand for ubsantrap immediate.
2020-12-09 10:17:16 +00:00
MCTargetDesc
[AArch64] Add a GPR64x8 register class
2020-12-17 13:45:46 +00:00
TargetInfo
llvmbuildectomy - replace llvm-build by plain cmake
2020-11-13 10:35:24 +01:00
Utils
[ARM][AArch64] Adding basic support for the v8.7-A architecture
2020-12-17 13:45:08 +00:00
AArch64.h
[AArch64][GlobalISel] Introduce a new post-isel optimization pass.
2020-10-23 10:18:36 -07:00
AArch64.td
[AArch64] Add support for the SPE-EEF feature
2020-12-18 11:11:56 +00:00
AArch64A53Fix835769.cpp
…
AArch64A57FPLoadBalancing.cpp
…
AArch64AdvSIMDScalarPass.cpp
[AArch64] Update a code comment incorrectly referring to zero_reg. NFC
2020-08-20 14:36:59 +02:00
AArch64AsmPrinter.cpp
[llvm][clang][mlir] Add checks for the return values from Target::createXXX to prevent protential null deref
2020-11-21 21:04:12 -08:00
AArch64BranchTargets.cpp
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
AArch64CallingConvention.cpp
[SVE] Deal with SVE tuple call arguments correctly when running out of registers
2020-11-12 08:41:50 +00:00
AArch64CallingConvention.h
…
AArch64CallingConvention.td
[Alignment][NFC] Use Align for TargetCallingConv::OrigAlign
2020-06-25 13:21:22 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
…
AArch64CollectLOH.cpp
[AArch64] Fix CollectLOH creating an AdrpAdd LOH when there's a live used reg
2020-06-01 16:00:55 -07:00
AArch64Combine.td
[AArch64][GlobalISel] Port some AArch64 target specific MUL combines from SDAG.
2020-11-10 22:21:13 -08:00
AArch64CompressJumpTables.cpp
[AArch64] Don't try to compress jump tables if there are any inline asm instructions.
2020-12-10 12:20:02 -08:00
AArch64CondBrTuning.cpp
[AArch64CondBrTuning] Ignore debug insts when scanning for NZCV clobbers [10/14]
2020-04-22 17:03:40 -07:00
AArch64ConditionalCompares.cpp
DomTree: Remove getChildren() accessor
2020-07-06 21:58:11 +02:00
AArch64ConditionOptimizer.cpp
MachineBasicBlock::updateTerminator now requires an explicit layout successor.
2020-06-06 22:30:51 -04:00
AArch64DeadRegisterDefinitionsPass.cpp
…
AArch64ExpandImm.cpp
…
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
Recommit "[AArch64] Lower calls with rv_marker attribute."
2020-12-13 16:20:39 +00:00
AArch64FalkorHWPFFix.cpp
Small fixes for "[LoopInfo] empty() -> isInnermost(), add isOutermost()"
2020-09-22 23:59:34 +03:00
AArch64FastISel.cpp
[FastISel] update to use intrinsic's isCommutative(); NFC
2020-08-30 11:36:41 -04:00
AArch64FrameLowering.cpp
Fix speling in comments. NFC.
2020-11-23 14:43:24 +00:00
AArch64FrameLowering.h
[SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference.
2020-11-05 11:02:18 +00:00
AArch64GenRegisterBankInfo.def
…
AArch64InstrAtomics.td
…
AArch64InstrFormats.td
[AArch64] Adding the v8.7-A LD64B/ST64B Accelerator extension
2020-12-17 13:46:23 +00:00
AArch64InstrGISel.td
[AArch64][GlobalISel] Add AArch64::G_DUPLANE[X] opcodes for lane duplicates.
2020-11-05 11:18:11 -08:00
AArch64InstrInfo.cpp
[MachineCombiner][NFC] Add MustReduceRegisterPressure goal
2020-12-14 00:02:42 -05:00
AArch64InstrInfo.h
[MachineCombiner][NFC] Add MustReduceRegisterPressure goal
2020-12-14 00:02:42 -05:00
AArch64InstrInfo.td
[AArch64] Add support for the SPE-EEF feature
2020-12-18 11:11:56 +00:00
AArch64ISelDAGToDAG.cpp
[AArch64][SVE] Fix umin/umax lowering to handle out of range imm.
2020-10-23 09:42:56 -07:00
AArch64ISelLowering.cpp
[SVE][CodeGen] Vector + immediate addressing mode for masked gather/scatter
2020-12-18 11:56:36 +00:00
AArch64ISelLowering.h
Expand the fp_to_int/int_to_fp/fp_round/fp_extend as libcall for fp128
2020-12-17 07:59:30 +00:00
AArch64LoadStoreOptimizer.cpp
[AArch64] Don't merge sp decrement into later stores when using WinCFI
2020-10-01 19:03:27 +03:00
AArch64MachineFunctionInfo.cpp
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
AArch64MachineFunctionInfo.h
[MTE] Pin the tagged base pointer to one of the stack slots.
2020-10-15 12:50:16 -07:00
AArch64MacroFusion.cpp
…
AArch64MacroFusion.h
…
AArch64MCInstLower.cpp
…
AArch64MCInstLower.h
…
AArch64PBQPRegAlloc.cpp
…
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
…
AArch64PfmCounters.td
…
AArch64PromoteConstant.cpp
[AArch64] Don't promote constants with float ConstantExpr.
2020-05-13 23:31:47 +01:00
AArch64RedundantCopyElimination.cpp
[AArch64] Fix Copy Elemination for negative values
2020-12-18 13:30:46 +00:00
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[NFC] Fix a few SVEInstrInfo related stylistic issues.
2020-12-15 16:10:38 +00:00
AArch64RegisterInfo.h
[AARCH64][RegisterCoalescer] clang miscompiles zero-extension to long long
2020-09-08 08:04:52 +01:00
AArch64RegisterInfo.td
[AArch64] Add a GPR64x8 register class
2020-12-17 13:45:46 +00:00
AArch64SchedA53.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedA55.td
[AArch64] Enable Cortex-A55 schedmodel
2020-11-30 19:28:34 +00:00
AArch64SchedA57.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedA57WriteRes.td
…
AArch64SchedCyclone.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedExynosM3.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedExynosM4.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedExynosM5.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedFalkor.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedFalkorDetails.td
…
AArch64SchedKryo.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedKryoDetails.td
…
AArch64SchedPredExynos.td
…
AArch64SchedPredicates.td
…
AArch64SchedThunderX2T99.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedThunderX3T110.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedThunderX.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedTSV110.td
[AArch64] Add pipeline model for HiSilicon's TSV110
2020-11-07 01:23:00 +03:00
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[CodeGen] Refactor getMemBasePlusOffset & getObjectPtrOffset to accept a TypeSize
2020-08-11 12:17:10 +01:00
AArch64SelectionDAGInfo.h
[Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemset to Align
2020-06-30 12:46:26 +00:00
AArch64SIMDInstrOpt.cpp
[AArch64] reuse another map iterator. NFC
2020-09-28 11:30:21 -07:00
AArch64SLSHardening.cpp
[NFC] Clean up uses of MachineModuleInfoWrapperPass
2020-07-01 09:45:05 -07:00
AArch64SpeculationHardening.cpp
…
AArch64StackTagging.cpp
Use cast<> instead of dyn_cast<> as we dereference the pointer immediately. NFCI.
2020-10-30 14:33:20 +00:00
AArch64StackTaggingPreRA.cpp
[MTE] Pin the tagged base pointer to one of the stack slots.
2020-10-15 12:50:16 -07:00
AArch64StorePairSuppress.cpp
…
AArch64Subtarget.cpp
[ARM][AArch64] Adding Neoverse N2 CPU support
2020-11-25 11:42:54 +00:00
AArch64Subtarget.h
[AArch64] Add support for the SPE-EEF feature
2020-12-18 11:11:56 +00:00
AArch64SVEInstrInfo.td
[NFC][SVE] Clean up bfloat isel patterns that emit non-bfloat instructions.
2020-12-18 13:20:41 +00:00
AArch64SystemOperands.td
[AArch64] Add support for the SPE-EEF feature
2020-12-18 11:11:56 +00:00
AArch64TargetMachine.cpp
[Triple][MachO] Define "arm64e", an AArch64 subarch for Pointer Auth.
2020-12-03 07:53:59 -08:00
AArch64TargetMachine.h
Support addrspacecast initializers with isNoopAddrSpaceCast
2020-07-31 10:42:43 -04:00
AArch64TargetObjectFile.cpp
…
AArch64TargetObjectFile.h
[llvm][ELF][AArch64] Handle R_AARCH64_PLT32 relocation
2020-06-10 11:34:16 -07:00
AArch64TargetTransformInfo.cpp
[AArch64][CostModel] Fix cost for mul <2 x i64>
2020-11-30 11:36:55 +00:00
AArch64TargetTransformInfo.h
[TTI] Add supportsScalableVectors target hook
2020-12-18 10:37:01 +00:00
CMakeLists.txt
llvmbuildectomy - replace llvm-build by plain cmake
2020-11-13 10:35:24 +01:00
SVEInstrFormats.td
[NFC][SVE] Clean up bfloat isel patterns that emit non-bfloat instructions.
2020-12-18 13:20:41 +00:00
SVEIntrinsicOpts.cpp
[SVE] Fix bug in SVEIntrinsicOpts::optimizePTest
2020-08-14 07:57:21 +01:00