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llvm-project/llvm/test/CodeGen
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Jessica Paquette fcc55c0952 [AArch64][GlobalISel] Use wzr/xzr for 16 and 32 bit stores of zero 
We weren't performing this optimization on 16 and 32 bit stores. SDAG happily
does this though.

e.g. https://godbolt.org/z/cWocKr

This saves about 0.2% in code size on CTMark at -O3.

Differential Revision: https://reviews.llvm.org/D84568
2020-07-24 17:15:20 -07:00
..
AArch64
[AArch64][GlobalISel] Use wzr/xzr for 16 and 32 bit stores of zero
2020-07-24 17:15:20 -07:00
AMDGPU
AMDGPU: Skip other terminators before inserting s_cbranch_exec[n]z
2020-07-24 16:51:59 -04:00
ARC
…
ARM
[Thumb] set code alignment for 16-bit load from constant pool
2020-07-22 10:12:41 +01:00
AVR
[AVR] Rewrite the function calling convention.
2020-06-23 21:36:18 +12:00
BPF
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
Generic
[llc] (almost) remove --print-machineinstrs
2020-07-20 10:43:28 -07:00
Hexagon
[llc] (almost) remove --print-machineinstrs
2020-07-20 10:43:28 -07:00
Inputs
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Lanai
…
Mips
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
MIR
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
MSP430
[MSP430] Declare comparison LibCalls as returning i16 instead of i32
2020-06-30 11:04:22 +03:00
NVPTX
[NVPTX] Fix for NVPTX module asm regression
2020-06-24 11:17:09 -07:00
PowerPC
[PowerPC] Fix computation of offset for load-and-splat for permuted loads
2020-07-24 15:38:46 -04:00
RISCV
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
SPARC
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
SystemZ
[SystemZ] Ensure -mno-vx disables any use of vector features
2020-07-23 15:34:59 +02:00
Thumb
…
Thumb2
[ARM] Added additional patterns to VABD instruction
2020-07-24 17:46:25 +00:00
VE
[VE] Support symbol with offset value
2020-07-01 23:55:27 +09:00
WebAssembly
[WebAssembly] Fix store_unfolded_offset tests in simd-offset.ll
2020-07-23 16:05:20 -07:00
WinCFGuard
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WinEH
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X86
[LegalizeTypes] Teach DAGTypeLegalizer::GenWidenVectorLoads to pad with undef if needed when concatenating small or loads to match a larger load
2020-07-23 19:02:03 -07:00
XCore
…