Philip Reames 1ef9410a96 Revert "[AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (#94647)" ...

This reverts commit e6aec2c12095cc7debd1a8004c8535eef41f4c36.  Commit breaks "ninja check-llvm" on x86 host.

2024-12-04 15:37:25 -08:00

..

AsmParser

AMDGPU: Simplify definition of bitop3 operand. NFC. (#118648)

2024-12-04 15:47:20 -05:00

Disassembler

AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (#117598)

2024-11-25 19:51:01 -08:00

MCA

[AMDGPU] Concatenate nested namespaces. NFC.

2024-07-16 15:36:49 +01:00

MCTargetDesc

AMDGPU: Add MC support for gfx950 V_BITOP3_B32/B16 (#117379)

2024-11-25 09:42:07 -08:00

TargetInfo

…

Utils

Revert "[AMDGPU] Use COV6 by default (#118515)"

2024-12-03 20:17:06 -05:00

AMDGPU.h

AMDGPU/GlobalISel: Add skeletons for new register bank select passes (#112862)

2024-12-03 16:02:00 -05:00

AMDGPU.td

AMDGPU: Add support for V_CVT_PK_F16_F32 instruction for gfx950 (#118300)

2024-12-02 16:04:24 -05:00

AMDGPUAliasAnalysis.cpp

…

AMDGPUAliasAnalysis.h

[IR] Don't include Module.h in Analysis.h (NFC) (#97023)

2024-06-28 14:30:47 +02:00

AMDGPUAlwaysInlinePass.cpp

[AMDGPU] Always Inline preserved analyses (#91198)

2024-05-09 06:17:01 -04:00

AMDGPUAnnotateKernelFeatures.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUAnnotateUniformValues.cpp

[AMDGPU] Preserve all analyses if nothing changed (#117994)

2024-11-28 14:33:05 +00:00

AMDGPUArgumentUsageInfo.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUArgumentUsageInfo.h

[NFC][AMDGPU] Assert no bad shift operations will happen (#108416)

2024-09-24 14:47:57 +04:00

AMDGPUAsanInstrumentation.cpp

[llvm] Remove redundant control flow statements (NFC) (#115831)

2024-11-12 10:09:42 -08:00

AMDGPUAsanInstrumentation.h

[AMDGPU] Update instrumentAddress method to support aligned size and unusual size accesses. (#104804)

2024-08-21 10:31:42 +05:30

AMDGPUAsmPrinter.cpp

[NFC][AMDGPU] Remove redundant code in AMDGPUAsmPrinter.cpp

2024-11-20 15:08:26 -05:00

AMDGPUAsmPrinter.h

[AMDGPU] Convert AMDGPUResourceUsageAnalysis pass from Module to MF pass (#102913)

2024-09-30 11:43:34 +01:00

AMDGPUAtomicOptimizer.cpp

[AMDGPU] Refine AMDGPUAtomicOptimizerImpl class. NFC. (#118302)

2024-12-03 07:40:17 +00:00

AMDGPUAttributes.def

Revert "[AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (#94647)"

2024-12-04 15:37:25 -08:00

AMDGPUAttributor.cpp

Revert "[AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (#94647)"

2024-12-04 15:37:25 -08:00

AMDGPUCallingConv.td

[NFC][AMDGPU] Use !foreach to replace explicit list of registers (#114005)

2024-10-29 10:50:06 -04:00

AMDGPUCallLowering.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUCallLowering.h

…

AMDGPUCodeGenPrepare.cpp

[AMDGPU] Refine AMDGPUCodeGenPrepareImpl class. NFC. (#118461)

2024-12-03 15:31:25 +00:00

AMDGPUCombine.td

AMDGPU/GlobalISel: Run redundant_and combine in RegBankCombiner (#112353)

2024-10-16 09:43:16 +02:00

AMDGPUCombinerHelper.cpp

AMDGPU/GlobalISel: Use correct type for intrinsic ID

2024-05-30 14:31:19 +02:00

AMDGPUCombinerHelper.h

[NFC] Eliminate top-level "using namespace" from some headers. (#102751)

2024-08-11 13:10:48 -07:00

AMDGPUCtorDtorLowering.cpp

AMDGPU: Add instruction flags when lowering ctor/dtor (#111652)

2024-10-09 18:03:35 +04:00

AMDGPUCtorDtorLowering.h

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AMDGPUExportClustering.cpp

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AMDGPUExportClustering.h

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AMDGPUFeatures.td

AMDGPU: Increase the LDS size to support to 160 KB for gfx950 (#116309)

2024-11-18 10:48:56 -08:00

AMDGPUFrameLowering.cpp

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AMDGPUFrameLowering.h

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AMDGPUGenRegisterBankInfo.def

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AMDGPUGISel.td

AMDGPU: Add v_permlane16_swap_b32 and v_permlane32_swap_b32 for gfx950 (#117260)

2024-11-22 20:12:50 -08:00

AMDGPUGlobalISelDivergenceLowering.cpp

[CodeGen][NewPM] Split MachinePostDominators into a concrete analysis result (#95113)

2024-06-12 14:29:22 +08:00

AMDGPUGlobalISelUtils.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUGlobalISelUtils.h

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AMDGPUHSAMetadataStreamer.cpp

AMDGPU: Treat uint32_max as the default value for amdgpu-max-num-workgroups (#113751)

2024-11-05 12:50:44 -08:00

AMDGPUHSAMetadataStreamer.h

[AMDGPU] MCExpr-ify AMDGPU HSAMetadata (#94788)

2024-06-26 16:39:08 +01:00

AMDGPUIGroupLP.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUIGroupLP.h

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AMDGPUImageIntrinsicOptimizer.cpp

[LLVM] Make more use of IRBuilder::CreateIntrinsic. NFC. (#112706)

2024-10-17 16:20:43 +01:00

AMDGPUInsertDelayAlu.cpp

[AMDGPU] Use the SchedModel available in SIInstrInfo (#110859)

2024-10-02 18:17:27 +02:00

AMDGPUInstCombineIntrinsic.cpp

[llvm][AMDGPU] Fold llvm.amdgcn.wavefrontsize early (#114481)

2024-11-25 10:29:50 +00:00

AMDGPUInstrInfo.cpp

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AMDGPUInstrInfo.h

AMDGPU/GlobalISel: Use correct type for intrinsic ID

2024-05-30 14:31:19 +02:00

AMDGPUInstrInfo.td

[AMDGPU] Fix AMDGPUISD::TRAP description (#117453)

2024-11-24 09:25:15 +03:00

AMDGPUInstructions.td

AMDGPU: Define v_mfma_f32_{16x16x128|32x32x64}_f8f6f4 instructions (#116723)

2024-11-21 08:51:58 -08:00

AMDGPUInstructionSelector.cpp

AMDGPU/GlobalISel: Do not try to form v_bitop3_b32 for SGPR results (#117940)

2024-11-30 20:21:20 -05:00

AMDGPUInstructionSelector.h

AMDGPU: Match and Select BITOP3 on gfx950 (#117843)

2024-11-27 01:31:19 -05:00

AMDGPUISelDAGToDAG.cpp

AMDGPU: Match and Select BITOP3 on gfx950 (#117843)

2024-11-27 01:31:19 -05:00

AMDGPUISelDAGToDAG.h

AMDGPU: Match and Select BITOP3 on gfx950 (#117843)

2024-11-27 01:31:19 -05:00

AMDGPUISelLowering.cpp

[AMDGPU] Use getSignedConstant() where necessary (#117328)

2024-11-25 09:49:34 +01:00

AMDGPUISelLowering.h

[AMDGPU] Remove unused AMDGPUISD enum members (NFC) (#115582)

2024-11-11 23:39:20 +03:00

AMDGPULateCodeGenPrepare.cpp

[AMDGPU] Preserve all analyses if nothing changed (#117994)

2024-11-28 14:33:05 +00:00

AMDGPULegalizerInfo.cpp

AMDGPU: Add support for V_CVT_PK_F16_F32 instruction for gfx950 (#118300)

2024-12-02 16:04:24 -05:00

AMDGPULegalizerInfo.h

Reapply "[AMDGPU][GlobalISel] Fix load/store of pointer vectors, buffer.*.pN (#110714)" v3 (#114443)

2024-11-01 11:13:29 -05:00

AMDGPULibCalls.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPULibFunc.cpp

[llvm][AMDGPU] Avoid Type::getPointerTo() (NFC)

2024-09-30 20:15:50 -05:00

AMDGPULibFunc.h

…

AMDGPULowerBufferFatPointers.cpp

[AMDGPU] Support nuw and nusw in buffer fat pointer lowering (#115039)

2024-11-06 11:42:47 -06:00

AMDGPULowerKernelArguments.cpp

[AMDGPU] Preserve noundef and range during kernel argument loads (#118395)

2024-12-04 11:04:03 -06:00

AMDGPULowerKernelAttributes.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPULowerModuleLDSPass.cpp

[AMDGPU] Fix a warning

2024-11-06 12:08:27 -08:00

AMDGPUMachineFunction.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUMachineFunction.h

Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108512)

2024-09-13 11:54:30 +02:00

AMDGPUMachineModuleInfo.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUMachineModuleInfo.h

[IR] Remove Function.h include from Analysis.h (NFC) (#97056)

2024-06-28 16:41:00 +02:00

AMDGPUMacroFusion.cpp

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AMDGPUMacroFusion.h

…

AMDGPUMarkLastScratchLoad.cpp

[CodeGen][NewPM] Port LiveIntervals to new pass manager (#98118)

2024-07-10 19:34:48 +08:00

AMDGPUMCInstLower.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUMCInstLower.h

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

AMDGPUMCResourceInfo.cpp

Reapply [AMDGPU] Avoid resource propagation for recursion through multiple functions (#112251)

2024-11-15 18:40:05 +00:00

AMDGPUMCResourceInfo.h

Add and call AMDGPUMCResourceInfo::reset method (#110818)

2024-10-02 14:17:01 +02:00

AMDGPUMemoryUtils.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUMemoryUtils.h

[AMDGPU] modify named barrier builtins and intrinsics (#114550)

2024-11-06 10:37:22 -08:00

AMDGPUMIRFormatter.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUMIRFormatter.h

[AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (#96004)

2024-06-20 15:59:08 -04:00

AMDGPUOpenCLEnqueuedBlockLowering.cpp

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AMDGPUPassRegistry.def

[AMDGPU][NewPM] Port SIOptimizeVGPRLiveRange pass to NPM. (#117686)

2024-11-29 09:11:24 +05:30

AMDGPUPerfHintAnalysis.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

AMDGPUPerfHintAnalysis.h

NewPM/AMDGPU: Port AMDGPUPerfHintAnalysis to new pass manager (#102645)

2024-08-11 15:11:10 +04:00

AMDGPUPostLegalizerCombiner.cpp

[AMDGPU][GlobalISel] Disable fixed-point iteration in all Combiners (#105517)

2024-08-22 17:14:53 +01:00

AMDGPUPredicateControl.td

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AMDGPUPreLegalizerCombiner.cpp

[AMDGPU][GlobalISel] Disable fixed-point iteration in all Combiners (#105517)

2024-08-22 17:14:53 +01:00

AMDGPUPrintfRuntimeBinding.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

AMDGPUPromoteAlloca.cpp

AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (#114144)

2024-11-06 08:47:15 -08:00

AMDGPUPromoteKernelArguments.cpp

[AMDGPU] Move AMDGPUMemoryUtils out of Utils. NFC. (#104930)

2024-08-20 16:15:46 +01:00

AMDGPUPTNote.h

…

AMDGPURegBankCombiner.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPURegBankLegalize.cpp

AMDGPU/GlobalISel: Add skeletons for new register bank select passes (#112862)

2024-12-03 16:02:00 -05:00

AMDGPURegBankSelect.cpp

AMDGPU/GlobalISel: Add skeletons for new register bank select passes (#112862)

2024-12-03 16:02:00 -05:00

AMDGPURegisterBankInfo.cpp

AMDGPU: Builtin & CodeGen support for v_cvt_sr_{bf16|f16}_f32 instructions (#117824)

2024-11-26 23:37:05 -05:00

AMDGPURegisterBankInfo.h

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AMDGPURegisterBanks.td

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AMDGPURemoveIncompatibleFunctions.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUReserveWWMRegs.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUResourceUsageAnalysis.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUResourceUsageAnalysis.h

[AMDGPU] Convert AMDGPUResourceUsageAnalysis pass from Module to MF pass (#102913)

2024-09-30 11:43:34 +01:00

AMDGPURewriteOutArguments.cpp

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AMDGPURewriteUndefForPHI.cpp

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AMDGPUSearchableTables.td

AMDGPU: Add support for load transpose instructions for gfx950 (#117378)

2024-11-25 09:39:04 -08:00

AMDGPUSetWavePriority.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUSplitModule.cpp

[AMDGPU][SplitModule] Fix unintentional integer division (#117586)

2024-11-27 10:18:52 +00:00

AMDGPUSplitModule.h

[NFC][AMDGPU] Make AMDGPUSplitModule a ModulePass (#95773)

2024-06-18 09:16:32 +02:00

AMDGPUSubtarget.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUSubtarget.h

AMDGPU: Add support for V_CVT_PK_F16_F32 instruction for gfx950 (#118300)

2024-12-02 16:04:24 -05:00

AMDGPUSwLowerLDS.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUTargetMachine.cpp

AMDGPU/GlobalISel: Add skeletons for new register bank select passes (#112862)

2024-12-03 16:02:00 -05:00

AMDGPUTargetMachine.h

Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)

2024-11-14 13:30:05 -08:00

AMDGPUTargetObjectFile.cpp

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AMDGPUTargetObjectFile.h

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AMDGPUTargetTransformInfo.cpp

[AMDGPU] Use wider loop lowering type for LowerMemIntrinsics (#112332)

2024-10-28 09:04:19 +01:00

AMDGPUTargetTransformInfo.h

[AMDGPU] Allow casts between the Global and Constant Addr Spaces in isValidAddrSpaceCast (#112493)

2024-10-22 09:33:21 +02:00

AMDGPUUnifyDivergentExitNodes.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUUnifyDivergentExitNodes.h

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AMDGPUUnifyMetadata.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

AMDKernelCodeT.h

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BUFInstructions.td

AMDGPU: Support buffer_atomic_pk_add_bf16 for gfx950 (#117599)

2024-11-25 19:54:50 -08:00

CaymanInstructions.td

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CMakeLists.txt

AMDGPU/GlobalISel: Add skeletons for new register bank select passes (#112862)

2024-12-03 16:02:00 -05:00

DSDIRInstructions.td

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DSInstructions.td

AMDGPU: Allow f16/bf16 for DS_READ_TR16_B64 gfx950 builtins (#118297)

2024-12-02 14:40:36 -05:00

EvergreenInstructions.td

DAG: Replace bitwidth with type in suffix in atomic tablegen ops (#94845)

2024-06-13 11:52:22 +02:00

EXPInstructions.td

[AMDGPU] Remove unnecessary predicates from aliases. NFC. (#91602)

2024-05-10 15:04:38 +01:00

FLATInstructions.td

[AMDGPU] Remove hasPostISelHook for atomics. NFC. (#116791)

2024-11-20 10:38:35 +00:00

GCNCreateVOPD.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

GCNDPPCombine.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

GCNDPPCombine.h

[CodeGen][NewPM] Make MFProperties methods const NFC (#113304)

2024-10-25 00:24:44 +05:30

GCNHazardRecognizer.cpp

AMDGPU: Handle cvt_scale F32/F16->F4/F8 gfx950 hazard (#117844)

2024-12-02 09:23:17 -05:00

GCNHazardRecognizer.h

AMDGPU: Handle vcmpx+permalane gfx950 hazard (#117286)

2024-11-25 09:27:53 -08:00

GCNILPSched.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

GCNIterativeScheduler.cpp

[AMDGPU] Optionally Use GCNRPTrackers during scheduling (#93090)

2024-10-09 09:54:11 -07:00

GCNIterativeScheduler.h

…

GCNMinRegStrategy.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

GCNNSAReassign.cpp

[NewPM][CodeGen] Port LiveRegMatrix to NPM (#109938)

2024-10-22 15:28:04 +05:30

GCNPreRALongBranchReg.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

GCNPreRAOptimizations.cpp

[AMDGPU] Use Lo_32 and Hi_32 helpers (NFC) (#109413)

2024-09-20 14:35:38 +02:00

GCNProcessors.td

AMDGPU: Remove wavefrontsize64 feature from dummy target (#117410)

2024-11-23 09:27:47 -08:00

GCNRegPressure.cpp

[AMDGPU] Optionally Use GCNRPTrackers during scheduling (#93090)

2024-10-09 09:54:11 -07:00

GCNRegPressure.h

[AMDGPU] Optionally Use GCNRPTrackers during scheduling (#93090)

2024-10-09 09:54:11 -07:00

GCNRewritePartialRegUses.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

GCNSchedStrategy.cpp

[AMDGPU] Fix expensive check

2024-10-09 10:24:06 -07:00

GCNSchedStrategy.h

[AMDGPU] Optionally Use GCNRPTrackers during scheduling (#93090)

2024-10-09 09:54:11 -07:00

GCNSubtarget.cpp

AMDGPU: Remove wavefrontsize64 feature from dummy target (#117410)

2024-11-23 09:27:47 -08:00

GCNSubtarget.h

AMDGPU: Handle cvt_scale F32/F16->F4/F8 gfx950 hazard (#117844)

2024-12-02 09:23:17 -05:00

GCNVOPDUtils.cpp

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GCNVOPDUtils.h

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InstCombineTables.td

[TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (#107339)

2024-09-07 15:11:34 -07:00

MIMGInstructions.td

[AMDGPU][MC] Fix disassemble of image_gather4 with d16 (#114609)

2024-11-05 10:36:54 -08:00

R600.h

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R600.td

…

R600AsmPrinter.cpp

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R600AsmPrinter.h

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R600ClauseMergePass.cpp

…

R600ControlFlowFinalizer.cpp

[AMDGPU] clang-tidy: no else after return etc. NFC. (#99298)

2024-07-17 21:11:00 +01:00

R600Defines.h

…

R600EmitClauseMarkers.cpp

[AMDGPU] Use range-based for loops (NFC) (#106184)

2024-08-27 06:46:01 -07:00

R600ExpandSpecialInstrs.cpp

…

R600FrameLowering.cpp

…

R600FrameLowering.h

[llvm] Consistently respect naked fn attribute in TargetFrameLowering::hasFP() (#106014)

2024-10-18 09:35:42 +04:00

R600InstrFormats.td

…

R600InstrInfo.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

R600InstrInfo.h

[TII][RISCV] Add renamable bit to copyPhysReg (#91179)

2024-08-27 10:08:43 +08:00

R600InstrInfo.td

…

R600Instructions.td

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R600ISelDAGToDAG.cpp

[NFC] Eliminate top-level "using namespace" from some headers. (#102751)

2024-08-11 13:10:48 -07:00

R600ISelLowering.cpp

[AMDGPU] Use getSignedConstant() where necessary (#117328)

2024-11-25 09:49:34 +01:00

R600ISelLowering.h

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R600MachineCFGStructurizer.cpp

[AMDGPU] clang-tidy: no else after return etc. NFC. (#99298)

2024-07-17 21:11:00 +01:00

R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

[AMDGPU] Use range-based for loops (NFC) (#106184)

2024-08-27 06:46:01 -07:00

R600MachineScheduler.h

[NFC] Eliminate top-level "using namespace" from some headers. (#102751)

2024-08-11 13:10:48 -07:00

R600MCInstLower.cpp

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R600OpenCLImageTypeLoweringPass.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

R600OptimizeVectorRegisters.cpp

[AMDGPU] clang-tidy: use emplace_back instead of push_back. NFC.

2024-07-17 08:27:35 +01:00

R600Packetizer.cpp

[Target] Use range-based for loops (NFC) (#98705)

2024-07-13 17:40:51 -07:00

R600Processors.td

[AMDGPU] Rename LocalMemorySize features to AddressableLocalMemorySize (#110242)

2024-09-30 10:29:31 +01:00

R600RegisterInfo.cpp

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R600RegisterInfo.h

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R600RegisterInfo.td

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R600Schedule.td

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R600Subtarget.cpp

[AMDGPU] Rename LocalMemorySize features to AddressableLocalMemorySize (#110242)

2024-09-30 10:29:31 +01:00

R600Subtarget.h

[InitUndef] Enable the InitUndef pass on non-AMDGPU targets (#108353)

2024-09-16 09:48:25 +02:00

R600TargetMachine.cpp

Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)

2024-11-14 13:30:05 -08:00

R600TargetMachine.h

[AMDGPU][R600] Move R600CodeGenPassBuilder into R600TargetMachine(NFC). (#103721)

2024-08-19 20:40:12 +05:30

R600TargetTransformInfo.cpp

[IR] Add getDataLayout() helpers to Function and GlobalValue (#96919)

2024-06-28 08:36:49 +02:00

R600TargetTransformInfo.h

…

R700Instructions.td

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SIAnnotateControlFlow.cpp

[AMDGPU] Emit amdgcn.if.break in the same BB as amdgcn.loop (#118081)

2024-12-04 08:42:04 +01:00

SIDefines.h

AMDGPU: Define v_mfma_f32_{16x16x128|32x32x64}_f8f6f4 instructions (#116723)

2024-11-21 08:51:58 -08:00

SIFixSGPRCopies.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

SIFixSGPRCopies.h

AMDGPU/NewPM: Port SIFixSGPRCopies to new pass manager (#102614)

2024-08-09 17:52:41 +04:00

SIFixVGPRCopies.cpp

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SIFoldOperands.cpp

AMDGPU: Do not fold copy to physreg from operation on frame index (#115977)

2024-11-12 21:35:51 -08:00

SIFoldOperands.h

AMDGPU/NewPM: Port SIFoldOperands to new pass manager (#105801)

2024-08-29 11:34:54 +05:30

SIFormMemoryClauses.cpp

[AMDGPU] Avoid repeated hash lookups (NFC) (#112115)

2024-10-12 22:07:22 -07:00

SIFrameLowering.cpp

[AMDGPU] Fix restores in chain functions (#116193)

2024-11-20 10:43:59 +01:00

SIFrameLowering.h

[llvm] Consistently respect naked fn attribute in TargetFrameLowering::hasFP() (#106014)

2024-10-18 09:35:42 +04:00

SIInsertHardClauses.cpp

…

SIInsertWaitcnts.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

SIInstrFormats.td

AMDGPU: Define v_mfma_f32_{16x16x128|32x32x64}_f8f6f4 instructions (#116723)

2024-11-21 08:51:58 -08:00

SIInstrInfo.cpp

AMDGPU: Use isWave[32|64] instead of comparing size value (#117411)

2024-11-23 09:30:57 -08:00

SIInstrInfo.h

AMDGPU: Create InstrMapping from VGPR MFMA to equivalent AGPR instruction (#117102)

2024-12-02 16:06:34 -05:00

SIInstrInfo.td

AMDGPU: Simplify definition of bitop3 operand. NFC. (#118648)

2024-12-04 15:47:20 -05:00

SIInstructions.td

[AMDGPU] Use getSignedConstant() where necessary (#117328)

2024-11-25 09:49:34 +01:00

SIISelLowering.cpp

AMDGPU: Add support for V_CVT_PK_F16_F32 instruction for gfx950 (#118300)

2024-12-02 16:04:24 -05:00

SIISelLowering.h

AMDGPU: Custom expand flat cmpxchg which may access private (#109410)

2024-11-04 09:29:38 -08:00

SILateBranchLowering.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

SILoadStoreOptimizer.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

SILoadStoreOptimizer.h

[CodeGen][NewPM] Make MFProperties methods const NFC (#113304)

2024-10-25 00:24:44 +05:30

SILowerControlFlow.cpp

[AMDGPU][NFC] Correct description (#112847)

2024-10-18 10:41:16 +02:00

SILowerI1Copies.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

SILowerI1Copies.h

…

SILowerSGPRSpills.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

SILowerSGPRSpills.h

[CodeGen][NewPM] Make MFProperties methods const NFC (#113304)

2024-10-25 00:24:44 +05:30

SILowerWWMCopies.cpp

[NewPM][CodeGen] Port VirtRegMap to NPM (#109936)

2024-10-22 15:15:56 +05:30

SIMachineFunctionInfo.cpp

Revert "[AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes" (#115353)

2024-11-07 13:02:51 -05:00

SIMachineFunctionInfo.h

[AMDGPU] Skip non-wwm reg implicit-def from bb prolog (#115834)

2024-11-12 23:30:57 +05:30

SIMachineScheduler.cpp

[AMDGPU] Avoid repeated map lookups (NFC) (#112819)

2024-10-21 10:35:53 -07:00

SIMachineScheduler.h

[AMDGPU] Default-initialize uninitialized class member variables (#108428)

2024-09-24 14:48:21 +04:00

SIMemoryLegalizer.cpp

[AMDGPU] Only emit SCOPE_SYS global_wb (#110636)

2024-10-07 07:35:31 +02:00

SIModeRegister.cpp

[AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (#104510)

2024-09-11 10:48:11 -04:00

SIModeRegisterDefaults.cpp

Reapply "AMDGPU: Implement llvm.set.rounding (#88587)" series (#91113)

2024-05-06 09:09:19 +02:00

SIModeRegisterDefaults.h

Reapply "AMDGPU: Implement llvm.set.rounding (#88587)" series (#91113)

2024-05-06 09:09:19 +02:00

SIOptimizeExecMasking.cpp

[AMDGPU] clang-tidy: no else after return etc. NFC. (#99298)

2024-07-17 21:11:00 +01:00

SIOptimizeExecMaskingPreRA.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

SIOptimizeVGPRLiveRange.cpp

[AMDGPU][SIOptimizeVGPRLiveRange] Add setpreservesCFG in the legacy pass flow. (#118256)

2024-12-02 23:16:03 +05:30

SIOptimizeVGPRLiveRange.h

[AMDGPU][NewPM] Port SIOptimizeVGPRLiveRange pass to NPM. (#117686)

2024-11-29 09:11:24 +05:30

SIPeepholeSDWA.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

SIPeepholeSDWA.h

[AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (#107049)

2024-09-11 14:30:16 +04:00

SIPostRABundler.cpp

…

SIPreAllocateWWMRegs.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

SIPreAllocateWWMRegs.h

[NewPM][AMDGPU] Port SIPreAllocateWWMRegs to NPM (#109939)

2024-10-22 15:37:08 +05:30

SIPreEmitPeephole.cpp

[AMDGPU] Fix -Wunused-variable in non-assertion builds after #109818

2024-10-11 08:52:11 -07:00

SIProgramInfo.cpp

[AMDGPU] MCExpr-ify AMDGPU HSAMetadata (#94788)

2024-06-26 16:39:08 +01:00

SIProgramInfo.h

[AMDGPU] MCExpr-ify AMDGPU HSAMetadata (#94788)

2024-06-26 16:39:08 +01:00

SIRegisterInfo.cpp

AMDGPU: Pass HwMode to AMDGPUGenRegisterInfo (#117449)

2024-11-25 14:21:52 -08:00

SIRegisterInfo.h

Reland [AMDGPU] Serialize WWM_REG vreg flag (#110229) (#112492)

2024-10-21 13:44:09 +05:30

SIRegisterInfo.td

AMDGPU: Add support for v_cvt_scalef32_sr instructions (#117820)

2024-11-26 23:20:16 -05:00

SISchedule.td

AMDGPU: Define new sched model for gfx950 (#117261)

2024-11-22 20:17:52 -08:00

SIShrinkInstructions.cpp

[AMDGPU][True16][MC] VOP2 update instructions with fake16 format (#114436)

2024-11-05 16:12:49 -05:00

SIShrinkInstructions.h

[AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (#106967)

2024-09-03 10:52:50 +05:30

SIWholeQuadMode.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

SMInstructions.td

[AMDGPU] Add target intrinsic for s_buffer_prefetch_data (#107293)

2024-09-06 11:41:21 -07:00

SOPInstructions.td

[AMDGPU] modify named barrier builtins and intrinsics (#114550)

2024-11-06 10:37:22 -08:00

VIInstrFormats.td

…

VINTERPInstructions.td

[AMDGPU] Remove unused template argument after #113634. NFC.

2024-11-15 11:54:59 +00:00

VOP1Instructions.td

AMDGPU: Add v_permlane16_swap_b32 and v_permlane32_swap_b32 for gfx950 (#117260)

2024-11-22 20:12:50 -08:00

VOP2Instructions.td

AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (#117598)

2024-11-25 19:51:01 -08:00

VOP3Instructions.td

AMDGPU: Change bitop3 intrinsic operand to i32 (#118647)

2024-12-04 15:44:04 -05:00

VOP3PInstructions.td

AMDGPU: Create InstrMapping from VGPR MFMA to equivalent AGPR instruction (#117102)

2024-12-02 16:06:34 -05:00

VOPCInstructions.td

[AMDGPU][True16][MC] VOPC profile fake16 pseudo update (#113175)

2024-11-22 12:12:13 -05:00

VOPDInstructions.td

…

VOPInstructions.td

AMDGPU: Add support for v_ashr_pk_i8/u8_i32 instructions for gfx950 (#117596)

2024-11-25 19:44:47 -08:00