ab4e06667d
For
add %reg1, name@GOTTPOFF(%rip), %reg2
add name@GOTTPOFF(%rip), %reg1, %reg2
{nf} add %reg1, name@GOTTPOFF(%rip), %reg2
{nf} add name@GOTTPOFF(%rip), %reg1, %reg2
{nf} add name@GOTTPOFF(%rip), %reg
add
`R_X86_64_CODE_6_GOTTPOFF` = 50
if the instruction starts at 6 bytes before the relocation offset. It's
similar to R_X86_64_GOTTPOFF.
Linker can treat `R_X86_64_CODE_6_GOTTPOFF` as `R_X86_64_GOTTPOFF` or
convert the instructions above to
add $name@tpoff, %reg1, %reg2
add $name@tpoff, %reg1, %reg2
{nf} add $name@tpoff, %reg1, %reg2
{nf} add $name@tpoff, %reg1, %reg2
{nf} add $name@tpoff, %reg
if the first byte of the instruction at the relocation `offset - 6` is
`0xd5` (namely, encoded w/REX2 prefix) when possible.
Binutils patch:
5bc71c2a6b
Binutils mailthread:
https://sourceware.org/pipermail/binutils/2024-February/132351.html
ABI discussion:
https://groups.google.com/g/x86-64-abi/c/FhEZjCtDLFw/m/VHDjN4orAgAJ
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation
124 lines
4.6 KiB
C++
124 lines
4.6 KiB
C++
//===-- X86WinCOFFObjectWriter.cpp - X86 Win COFF Writer ------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/X86FixupKinds.h"
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#include "MCTargetDesc/X86MCTargetDesc.h"
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#include "llvm/BinaryFormat/COFF.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCFixup.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/MC/MCWinCOFFObjectWriter.h"
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#include "llvm/Support/ErrorHandling.h"
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using namespace llvm;
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namespace {
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class X86WinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter {
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public:
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X86WinCOFFObjectWriter(bool Is64Bit);
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~X86WinCOFFObjectWriter() override = default;
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unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
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const MCFixup &Fixup, bool IsCrossSection,
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const MCAsmBackend &MAB) const override;
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};
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} // end anonymous namespace
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X86WinCOFFObjectWriter::X86WinCOFFObjectWriter(bool Is64Bit)
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: MCWinCOFFObjectTargetWriter(Is64Bit ? COFF::IMAGE_FILE_MACHINE_AMD64
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: COFF::IMAGE_FILE_MACHINE_I386) {}
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unsigned X86WinCOFFObjectWriter::getRelocType(MCContext &Ctx,
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const MCValue &Target,
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const MCFixup &Fixup,
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bool IsCrossSection,
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const MCAsmBackend &MAB) const {
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const bool Is64Bit = getMachine() == COFF::IMAGE_FILE_MACHINE_AMD64;
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unsigned FixupKind = Fixup.getKind();
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if (IsCrossSection) {
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// IMAGE_REL_AMD64_REL64 does not exist. We treat FK_Data_8 as FK_PCRel_4 so
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// that .quad a-b can lower to IMAGE_REL_AMD64_REL32. This allows generic
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// instrumentation to not bother with the COFF limitation. A negative value
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// needs attention.
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if (FixupKind == FK_Data_4 || FixupKind == llvm::X86::reloc_signed_4byte ||
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(FixupKind == FK_Data_8 && Is64Bit)) {
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FixupKind = FK_PCRel_4;
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} else {
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Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression");
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return COFF::IMAGE_REL_AMD64_ADDR32;
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}
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}
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MCSymbolRefExpr::VariantKind Modifier = Target.isAbsolute() ?
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MCSymbolRefExpr::VK_None : Target.getSymA()->getKind();
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if (Is64Bit) {
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switch (FixupKind) {
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case FK_PCRel_4:
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case X86::reloc_riprel_4byte:
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case X86::reloc_riprel_4byte_movq_load:
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case X86::reloc_riprel_4byte_movq_load_rex2:
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case X86::reloc_riprel_4byte_relax:
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case X86::reloc_riprel_4byte_relax_rex:
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case X86::reloc_riprel_4byte_relax_rex2:
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case X86::reloc_riprel_6byte_relax:
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case X86::reloc_branch_4byte_pcrel:
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return COFF::IMAGE_REL_AMD64_REL32;
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case FK_Data_4:
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case X86::reloc_signed_4byte:
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case X86::reloc_signed_4byte_relax:
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if (Modifier == MCSymbolRefExpr::VK_COFF_IMGREL32)
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return COFF::IMAGE_REL_AMD64_ADDR32NB;
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if (Modifier == MCSymbolRefExpr::VK_SECREL)
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return COFF::IMAGE_REL_AMD64_SECREL;
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return COFF::IMAGE_REL_AMD64_ADDR32;
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case FK_Data_8:
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return COFF::IMAGE_REL_AMD64_ADDR64;
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case FK_SecRel_2:
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return COFF::IMAGE_REL_AMD64_SECTION;
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case FK_SecRel_4:
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return COFF::IMAGE_REL_AMD64_SECREL;
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default:
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Ctx.reportError(Fixup.getLoc(), "unsupported relocation type");
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return COFF::IMAGE_REL_AMD64_ADDR32;
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}
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} else if (getMachine() == COFF::IMAGE_FILE_MACHINE_I386) {
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switch (FixupKind) {
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case FK_PCRel_4:
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case X86::reloc_riprel_4byte:
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case X86::reloc_riprel_4byte_movq_load:
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return COFF::IMAGE_REL_I386_REL32;
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case FK_Data_4:
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case X86::reloc_signed_4byte:
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case X86::reloc_signed_4byte_relax:
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if (Modifier == MCSymbolRefExpr::VK_COFF_IMGREL32)
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return COFF::IMAGE_REL_I386_DIR32NB;
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if (Modifier == MCSymbolRefExpr::VK_SECREL)
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return COFF::IMAGE_REL_I386_SECREL;
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return COFF::IMAGE_REL_I386_DIR32;
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case FK_SecRel_2:
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return COFF::IMAGE_REL_I386_SECTION;
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case FK_SecRel_4:
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return COFF::IMAGE_REL_I386_SECREL;
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default:
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Ctx.reportError(Fixup.getLoc(), "unsupported relocation type");
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return COFF::IMAGE_REL_I386_DIR32;
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}
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} else
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llvm_unreachable("Unsupported COFF machine type.");
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}
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std::unique_ptr<MCObjectTargetWriter>
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llvm::createX86WinCOFFObjectWriter(bool Is64Bit) {
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return std::make_unique<X86WinCOFFObjectWriter>(Is64Bit);
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}
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