8687f7cd66
Previously getIntImmInstCost only calculated the cost of materialising the argument of a store if it was the address. This means ConstantHoisting's transformation wouldn't kick in for cases like storing two values that require multiple instructions to materialise but where one can be cheaply generated from the other (e.g. by an addition). Two key changes were needed to avoid regressions when enabling this: * Allowing constant materialisation cost to be calculated assuming zeroes are free (as might happen if you had a 2*XLEN constant and one half is zero). * Avoiding constant hoisting if we have a misaligned store that's going to be a legalised to a sequence of narrower stores. I'm seeing cases where hoisting the constant ends up with worse codegen in that case. Out of caution and so as not to unexpectedly degrade other existing hoisting logic, FreeZeroes is used only for the new cost calculations for the load instruction. It would likely make sense to revisit this later.
275 lines
7.4 KiB
LLVM
275 lines
7.4 KiB
LLVM
; RUN: opt -mtriple=riscv32-unknown-elf -S -passes=consthoist < %s | FileCheck %s
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; RUN: opt -mtriple=riscv64-unknown-elf -S -passes=consthoist < %s | FileCheck %s
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; Check that we don't hoist immediates with small values.
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define i64 @test1(i64 %a) nounwind {
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; CHECK-LABEL: test1
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; CHECK-NOT: %const = bitcast i64 2 to i64
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%1 = mul i64 %a, 2
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%2 = add i64 %1, 2
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ret i64 %2
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}
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; Check that we don't hoist immediates with small values.
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define i64 @test2(i64 %a) nounwind {
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; CHECK-LABEL: test2
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; CHECK-NOT: %const = bitcast i64 2047 to i64
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%1 = mul i64 %a, 2047
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%2 = add i64 %1, 2047
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ret i64 %2
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}
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; Check that we hoist immediates with large values.
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define i64 @test3(i64 %a) nounwind {
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; CHECK-LABEL: test3
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; CHECK: %const = bitcast i64 32766 to i64
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%1 = mul i64 %a, 32766
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%2 = add i64 %1, 32766
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ret i64 %2
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}
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; Check that we hoist immediates with very large values.
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define i128 @test4(i128 %a) nounwind {
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; CHECK-LABEL: test4
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; CHECK: %const = bitcast i128 12297829382473034410122878 to i128
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%1 = add i128 %a, 12297829382473034410122878
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%2 = add i128 %1, 12297829382473034410122878
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ret i128 %2
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}
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; Check that we hoist zext.h without Zbb.
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define i32 @test5(i32 %a) nounwind {
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; CHECK-LABEL: test5
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; CHECK: %const = bitcast i32 65535 to i32
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%1 = and i32 %a, 65535
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%2 = and i32 %1, 65535
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ret i32 %2
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}
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; Check that we don't hoist zext.h with 65535 with Zbb.
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define i32 @test6(i32 %a) nounwind "target-features"="+zbb" {
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; CHECK-LABEL: test6
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; CHECK: and i32 %a, 65535
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%1 = and i32 %a, 65535
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%2 = and i32 %1, 65535
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ret i32 %2
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}
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; Check that we hoist zext.w without Zba.
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define i64 @test7(i64 %a) nounwind {
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; CHECK-LABEL: test7
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; CHECK: %const = bitcast i64 4294967295 to i64
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%1 = and i64 %a, 4294967295
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%2 = and i64 %1, 4294967295
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ret i64 %2
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}
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; Check that we don't hoist zext.w with Zba.
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define i64 @test8(i64 %a) nounwind "target-features"="+zba" {
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; CHECK-LABEL: test8
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; CHECK: and i64 %a, 4294967295
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%1 = and i64 %a, 4294967295
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%2 = and i64 %1, 4294967295
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ret i64 %2
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}
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; Check that we don't hoist mul with negated power of 2.
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define i64 @test9(i64 %a) nounwind {
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; CHECK-LABEL: test9
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; CHECK: mul i64 %a, -4294967296
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%1 = mul i64 %a, -4294967296
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%2 = mul i64 %1, -4294967296
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ret i64 %2
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}
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define i32 @test10(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: @test10(
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; CHECK: shl i32 %a, 8
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; CHECK: and i32 %1, 65280
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; CHECK: shl i32 %b, 8
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; CHECK: and i32 %3, 65280
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%1 = shl i32 %a, 8
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%2 = and i32 %1, 65280
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%3 = shl i32 %b, 8
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%4 = and i32 %3, 65280
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%5 = mul i32 %2, %4
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ret i32 %5
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}
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; bseti
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define i64 @test11(i64 %a) nounwind "target-features"="+zbs" {
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; CHECK-LABEL: test11
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; CHECK: or i64 %a, 8589934592
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%1 = or i64 %a, 8589934592 ; 1 << 33
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%2 = or i64 %1, 8589934592 ; 1 << 33
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ret i64 %2
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}
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; binvi
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define i64 @test12(i64 %a) nounwind "target-features"="+zbs" {
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; CHECK-LABEL: test12
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; CHECK: xor i64 %a, -9223372036854775808
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%1 = xor i64 %a, -9223372036854775808 ; 1 << 63
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%2 = xor i64 %1, -9223372036854775808 ; 1 << 63
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ret i64 %2
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}
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; bclri
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define i64 @test13(i64 %a) nounwind "target-features"="+zbs" {
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; CHECK-LABEL: test13
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; CHECK: and i64 %a, -281474976710657
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%1 = and i64 %a, -281474976710657 ; ~(1 << 48)
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%2 = and i64 %1, -281474976710657 ; ~(1 << 48)
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ret i64 %2
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}
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; Check that we don't hoist mul by a power of 2.
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define i64 @test14(i64 %a) nounwind {
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; CHECK-LABEL: test14
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; CHECK: mul i64 %a, 2048
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%1 = mul i64 %a, 2048
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%2 = mul i64 %1, 2048
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ret i64 %2
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}
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; Check that we don't hoist mul by one less than a power of 2.
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define i64 @test15(i64 %a) nounwind {
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; CHECK-LABEL: test15
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; CHECK: mul i64 %a, 65535
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%1 = mul i64 %a, 65535
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%2 = mul i64 %1, 65535
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ret i64 %2
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}
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; Check that we don't hoist mul by one more than a power of 2.
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define i64 @test16(i64 %a) nounwind {
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; CHECK-LABEL: test16
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; CHECK: mul i64 %a, 65537
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%1 = mul i64 %a, 65537
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%2 = mul i64 %1, 65537
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ret i64 %2
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}
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; Check that we hoist the absolute address of the stores to the entry block.
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define void @test17(ptr %s, i32 %size) nounwind {
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; CHECK-LABEL: test17
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; CHECK: %const = bitcast i32 -1073741792 to i32
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; CHECK: %0 = inttoptr i32 %const to ptr
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; CHECK: store i32 20, ptr %0
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; CHECK: %1 = inttoptr i32 %const to ptr
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; CHECK: store i32 10, ptr %1
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entry:
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%cond = icmp eq i32 %size, 0
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br i1 %cond, label %if.true, label %exit
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if.true:
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store i32 20, ptr inttoptr (i32 -1073741792 to ptr)
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br label %exit
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exit:
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store i32 10, ptr inttoptr (i32 -1073741792 to ptr)
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ret void
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}
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; Check that we hoist the absolute address of the loads to the entry block.
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define i32 @test18(ptr %s, i32 %size) nounwind {
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; CHECK-LABEL: test18
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; CHECK: %const = bitcast i32 -1073741792 to i32
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; CHECK: %0 = inttoptr i32 %const to ptr
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; CHECK: %1 = load i32, ptr %0
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; CHECK: %2 = inttoptr i32 %const to ptr
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; CHECK: %3 = load i32, ptr %2
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entry:
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%cond = icmp eq i32 %size, 0
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br i1 %cond, label %if.true, label %if.false
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if.true:
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%0 = load i32, ptr inttoptr (i32 -1073741792 to ptr)
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br label %return
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if.false:
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%1 = load i32, ptr inttoptr (i32 -1073741792 to ptr)
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br label %return
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return:
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%val = phi i32 [%0, %if.true], [%1, %if.false]
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ret i32 %val
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}
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; For addresses between [0, 2048), we can use ld/sd xN, address(zero), so don't
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; hoist.
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define void @test19(ptr %s, i32 %size) nounwind {
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; CHECK-LABEL: test19
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; CHECK: store i32 20, ptr inttoptr (i32 2044 to ptr)
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; CHECK: store i32 10, ptr inttoptr (i32 2044 to ptr)
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entry:
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%cond = icmp eq i32 %size, 0
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br i1 %cond, label %if.true, label %exit
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if.true:
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store i32 20, ptr inttoptr (i32 2044 to ptr)
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br label %exit
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exit:
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store i32 10, ptr inttoptr (i32 2044 to ptr)
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ret void
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}
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; Check that we use a common base for immediates needed by a store if the
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; constants require more than 1 instruction.
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define void @test20(ptr %p1, ptr %p2) {
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; CHECK-LABEL: test20
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; CHECK: %const = bitcast i32 15111111 to i32
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; CHECK: store i32 %const, ptr %p1, align 4
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; CHECK: %const_mat = add i32 %const, 1
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; CHECK: store i32 %const_mat, ptr %p2, align 4
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store i32 15111111, ptr %p1, align 4
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store i32 15111112, ptr %p2, align 4
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ret void
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}
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define void @test21(ptr %p1, ptr %p2) {
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; CHECK-LABEL: define void @test21(
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; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) {
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; CHECK-NEXT: store i32 15111111, ptr [[P1]], align 1
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; CHECK-NEXT: store i32 15111112, ptr [[P2]], align 1
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; CHECK-NEXT: ret void
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;
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store i32 15111111, ptr %p1, align 1
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store i32 15111112, ptr %p2, align 1
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ret void
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}
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; 0 immediates shouldn't be hoisted.
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define void @test22(ptr %p1, ptr %p2) {
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; CHECK-LABEL: define void @test22(
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; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) {
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; CHECK-NEXT: store i64 0, ptr [[P1]], align 8
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; CHECK-NEXT: store i64 -1, ptr [[P2]], align 8
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; CHECK-NEXT: ret void
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;
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store i64 0, ptr %p1, align 8
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store i64 -1, ptr %p2, align 8
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ret void
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}
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; 0 immediates shouldn't be hoisted.
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define void @test23(ptr %p1, ptr %p2) {
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; CHECK-LABEL: define void @test23(
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; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) {
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; CHECK-NEXT: store i127 0, ptr [[P1]], align 8
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; CHECK-NEXT: store i127 -1, ptr [[P2]], align 8
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; CHECK-NEXT: ret void
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;
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store i127 0, ptr %p1, align 8
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store i127 -1, ptr %p2, align 8
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ret void
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}
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; Hoisting doesn't happen for types that aren't legal.
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define void @test24(ptr %p1, ptr %p2) {
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; CHECK-LABEL: define void @test24(
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; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) {
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; CHECK-NEXT: store i128 15111111, ptr [[P1]], align 4
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; CHECK-NEXT: store i128 15111112, ptr [[P2]], align 4
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; CHECK-NEXT: ret void
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;
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store i128 15111111, ptr %p1, align 4
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store i128 15111112, ptr %p2, align 4
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ret void
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}
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