Shilei Tian 6548b6354d Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)" ...

This reverts commit ca33649abe5fad93c57afef54e43ed9b3249cd86.

2024-11-08 20:21:16 -05:00

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address-space-id-funcs.ll

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assumed-addrspace.ll

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basic.ll

InferAddressSpaces: Restore non-instruction user check

2024-08-15 15:55:09 +04:00

builtin-assumed-addrspace.ll

InferAddressSpaces: Convert test to generated checks

2024-08-16 15:05:41 +04:00

debug-info.ll

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flat_atomic.ll

Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)"

2024-11-08 20:21:16 -05:00

icmp.ll

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infer-address-space.ll

[IR] Remove support for icmp and fcmp constant expressions (#93038)

2024-06-04 08:31:03 +02:00

infer-addrspacecast.ll

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infer-getelementptr.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

2024-11-06 11:53:33 +00:00

insert-pos-assert.ll

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intrinsics.ll

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is.constant.ll

InferAddressSpaces: Handle llvm.is.constant (#102010)

2024-08-06 00:20:01 +04:00

issue53665.ll

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issue110433.ll

AMDGPU: Fix assertion on load of vector of pointers (#110436)

2024-09-30 10:16:38 +04:00

lit.local.cfg

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masked-load-store.ll

InferAddressSpaces: Handle masked load and store intrinsics (#102007)

2024-08-06 00:17:07 +04:00

mem-intrinsics.ll

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multiple-uses-of-val.ll

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no-flat-addrspace.ll

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noop-ptrint-pair.ll

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old-pass-regressions-inseltpoison.ll

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old-pass-regressions.ll

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prefetch.ll

InferAddressSpaces: Handle prefetch intrinsic (#101982)

2024-08-06 00:14:02 +04:00

preserving-debugloc-addrspacecast.ll

[DebugInfo][InferAddressSpaces] Fix the missing debug location update for the new addrspacecast (#97038)

2024-07-03 09:39:17 +08:00

ptrmask.ll

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redundant-addrspacecast.ll

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select.ll

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self-phi.ll

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store-pointer-to-self.ll

InferAddressSpaces: Improve handling of instructions with multiple pointer uses (#101922)

2024-08-08 13:19:35 +04:00

unreachable-code-assert.ll

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volatile.ll

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